NetNews Usenet Archive 1992 #26/NN_1992_26.iso/spool/comp/sys/ibm/pc/hardware/29593

Text File | 1992-11-11 | 1.6 KB | 35 lines

Newsgroups: comp.sys.ibm.pc.hardware
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From: [e-mail] (John Ackermann x 2966)
Subject: BIOS Configuration:  Wait States and Bus Speed
Message-ID: <[e-mail]>
Reply-To: [e-mail] (John Ackermann x 2966)
Organization: NCR Corporation -- Law Department
Date: Wed, 11 Nov 1992 13:50:45 GMT
Lines: 24

I recently got a new 25MHz 486SX motherboard with AMI BIOS (07/07/91).
As usual, the manuals aren't very helpful, so I have a couple of questions:

The board has 64k external cache and 8MB of 70ns memory.  With the CPU
running at 25MHz, should this be able to run at 0 wait states, or is 1
WS more appropriate?

Also, the manual suggests turning interleaving on if you have both
memory banks full (as I do), but the BIOS doesn't seem to have an
interleave option in the setup.  Would this be done automatically, or
does that mean the BIOS doesn't support memory interleave?

Finally, the bus speed is set in terms of CLKIN and the options are to
divide CLKIN by 10, 8, 6, or 4.  Is CLKIN the 50MHz oscillator, or the
25MHz CPU speed?  Given these divisors, the 50MHz oscillator divided by
6 would yield ~8MHz bus speed.  Is that the correct guess, and the right
setting to use?

Thanks...

--
John R. Ackermann, Jr.        Law Department, NCR Corporation, Dayton, Ohio
[phone]              [e-mail]
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