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- Path: sparky!uunet!gatech!asuvax!chnews!chnews!doconnor
- From: doconnor@sedona.intel.com (Dennis O'Connor)
- Newsgroups: comp.sys.intel
- Subject: Re: 960 XA/MX Questions
- Date: 9 Jan 93 13:32:20
- Organization: Intel i960(tm) Architecture
- Lines: 23
- Message-ID: <DOCONNOR.93Jan9133220@potato.sedona.intel.com>
- References: <1993Jan08.173711.14431@donau.et.tudelft.nl>
- <1993Jan8.215944.10065@gandalf.ca>
- <DOCONNOR.93Jan8234804@potato.sedona.intel.com>
- <16313@auspex-gw.auspex.com>
- NNTP-Posting-Host: potato.intel.com
- In-reply-to: guy@Auspex.COM's message of 9 Jan 93 19:31:11 GMT
-
-
- guy@Auspex.COM (Guy Harris) writes:
- ]
- ] > MC : core + FPU + MMU, mil-spec
- ] > XA : MC + object-oriented tagged architecture, mil-spec
- ]
- ] I.e., the BiiN machines all used mil-spec chips? :-)
-
- The chips the BiiN machine used ( past tense ) are currently
- only available as mil-spec parts.
-
- ] >Note that none of the commercial parts are the same die as
- ] >any of the military parts : that would cost too much.
- ]
- ] I seem to remember Steve McGeady implying that, at least in some sense,
- ] the KA, KB, MC, and XA all used the same die, even though the dies on
- ] the mil-spec versions might be more rigorously tested. The XA may have
- ] an extra pin or so for the tag bit.
-
- This was true in the past. I'm pretty sure it is no longer true.
-
- --
- Dennis O'Connor doconnor@sedona.intel.com
-