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- Path: sparky!uunet!paladin.american.edu!howland.reston.ans.net!usc!news.service.uci.edu!venice.eng.uci.edu!jtien
- From: jtien@venice.eng.uci.edu (Joe Tien)
- Subject: Harvard architecture
- Nntp-Posting-Host: venice.eng.uci.edu
- Message-ID: <2B51D662.29834@news.service.uci.edu>
- Newsgroups: comp.arch
- Reply-To: jtien@venice.eng.uci.edu (Joe Tien)
- Organization: University of California, Irvine
- Lines: 12
- Date: 11 Jan 93 20:19:46 GMT
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-
- Could someone direct me to a good definition of the harvard architecture? Is it
- dual memory port (each with own set of address and data bus) or is it just dual
- bus (separate address and data bus used for both instruction and data.)
-
- If possible, I'd prefer some type of reference I can use in my paper, not that
- I don't trust the infinite wisdom of the net. :-)
-
- Thanks,
-
- Joe Tien
- jtien@balboa.eng.uci.edu
-