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- Path: sparky!uunet!utcsri!torn!nott!cunews!revcan!sidus!qube!Zapper
- From: Zapper@qube.OCUnix.On.Ca (Zapper)
- Newsgroups: comp.sys.amiga.hardware
- Subject: Re: 35ns, and screen modes ?
- Distribution: world
- Message-ID: <Zapper.0qu2@qube.OCUnix.On.Ca>
- Date: 17 Dec 92 14:50:54 EDT
- Organization: The QuBE BBS
- Lines: 36
-
- In a message dated Thu 16 Dec 92 9:05, 22black@sol.cs.wmich.edu (martin Bl
- wrote:
-
- B> I have heard that the new aga chips do have a 35ns pixel clock.
- B> And as it has been explained to me you use this formula
- B> (1/pixel clock ns)*(1/pixels on screen)=fps or hz
-
- B> you have:
- B> 1 1 1
- B> ------- * ----- * --- = 59.5 fps
- B> 35 ns 800 600
-
- B> So isn't it concievable to have atleast a 50hz noninterlace 800x600
- B> screen?
-
- B> What part of this equation am I missing?
-
- Your equation would be true if the AGA chips were generating pixels on a
- 100% duty cycle...
-
- But there is a lot of "down time" while the beam is reset, during the
- HBLANK and especially VBLANK...
-
- So even though during one 1/59.5 of a second AGA can process enough
- pixels for an 800x600 screen, it's limited to being "productive" during
- discrete portions of the screen refresh...
-
- And it's during these times that the 35ns pixel clock is the stopper...
-
-
- -- Via DLG Pro v0.992
-
- ----------------------------------------------------------------------
- Zapper@qube.ocunix.on.ca | *luv 4-ever to slow@royalroads!*
- Trevor Boicey, UofO Comp. Eng. | She's got pretty pursuasion....-REM
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