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- Newsgroups: comp.sys.next.misc
- Path: sparky!uunet!haven.umd.edu!darwin.sura.net!spool.mu.edu!agate!dog.ee.lbl.gov!news!nosc!pages!kevin
- From: kevin@pages (Kevin Sven Berg)
- Subject: Re: New RISC chip?
- Message-ID: <1992Nov12.120159.9022@pages.com>
- Sender: kevin@pages.com
- Organization: Banzai Research Institute
- References: <1992Nov11.211338.405@pages.com>
- Distribution: usa
- Date: Thu, 12 Nov 1992 12:01:59 GMT
- Lines: 36
-
- In article <1992Nov11.211338.405@pages.com> bruce@pages.com(Bruce Henderson)
- writes:
- > In article <1992Nov7.115521.3737@cubetech.com> andrew@cubetech.com writes:
- > >>some new RISC chip: the IMS3250 which is supposed to run at 100 Mhz, 90
- Mips,
- > >>and be able to emulate both a 486@25Mhz and a 68040@30Mhz. Here's the
- > >>
- > >>Umm... this ISN'T the same chip going in the PowerPC/Pink thingy between
- > >>Apple/IBM, right? I can see the 486 emulation, but for the 68040
- > >>emulation... wow...
- > > Yeah, someone mentioned this to me at the last hAng meeting. Now, I'm
- > > no processor architecture wiz, but it sounds like complete B.S. to me.
- >
- > No. It is for real. I have specs and docs on that chip, I have had a hands
- > on live demo of it running the Mac OS. It is for real. I wanted NeXT to talk
- > to them, but they (NeXT) has there hands full at the moment. This chip can
- > do all of this because it has loadable microcode. So you write microcode
- > that emulates the 486 instruction set, or the SPARC instruction set... You
- > name it.
- >
- > This thing is very nifty
- >
- > Bruce
-
- The strange thing is that this technology isn't even new. Check out
- the WISC (Writeable Instruction Set Computers) that have floated
- around the FORTH community for more than a decade. Extremely cool,
- and very fast :-) I only hope (like Bruce) this stuff sees
- commercial use.
-
- Kevin
- --
- Kevin Sven Berg / / / / P / a / g / e / s
- kevin@pages.com / / / / / / / /
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