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- From: rabin@cs.qmw.ac.uk (Rabin Ezra;PhD;E200)
- Newsgroups: comp.sys.acorn.tech
- Subject: Re: ARMXX & MHz
- Message-ID: <1992Nov13.162740.25352@dcs.qmw.ac.uk>
- Date: 13 Nov 92 16:27:40 GMT
- References: <BxntqI.1Io@brunel.ac.uk>
- Sender: usenet@dcs.qmw.ac.uk (Usenet News System)
- Organization: Computer Science Dept, QMW, University of London
- Lines: 12
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-
- I suspect that these are for programs that don't break cache too much. With
- the ARM2, the memory system keeps up reasonably well. With the ARM3 the cache
- helps to hide the effects of slow memory, though as soon as the cache breaks
- the performance drops to that of an ARM2, or slightly worse. The ARM600 gains
- a write back buffer which decouples the core from memory even more, but again
- if you have massive inline code you can slow the processor right down.
- Rabin Ezra
- --
- Rabin Ezra, PhD Student Internet: rabin@dcs.qmw.ac.uk
- Dept of Computer Science, UUCP: rabin@qmw-dcs.UUCP
- Queen Mary and Westfield College, JANET: rabin@uk.ac.qmw.dcs
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