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- Path: sparky!uunet!ukma!wupost!uwm.edu!ogicse!flop.ENGR.ORST.EDU!flop.ENGR.ORST.EDU!usenet
- From: villalj@xanth.CS.ORST.EDU (John Villalovos)
- Newsgroups: comp.os.os2.misc
- Subject: Re: OS/2's Interrupt Mapping
- Keywords: IRQ, Interrupt
- Message-ID: <1dertsINNlf9@flop.ENGR.ORST.EDU>
- Date: 6 Nov 92 22:34:36 GMT
- Article-I.D.: flop.1dertsINNlf9
- References: <1992Nov6.180326.10300@u.washington.edu>
- Organization: Oregon State University
- Lines: 28
- NNTP-Posting-Host: xanth.cs.orst.edu
-
- In article <1992Nov6.180326.10300@u.washington.edu> mts@hardy.u.washington.edu (Sean Milligan) writes:
- > I read somewhere that OS/2 calls the interrupt addresses by different
- >numbers. (Ex. 9 is IRQ2, I think). I'm trying to get all my boards to work
- >and was wondering if anyone knows if this is true and if so would they please
- >post the various addresses for OS/2 corresponding to the "Real world" settings.
- >
- What you might be refering to is the difference between a hardware interupt
- setting and a software interupt setting. On the IBM PC's interupts 0-7 are
- used by various processes. e.g. INT 0 divide by 0 trap, INT 1 Single step,
- INT 2 Various errors, INT 3 Breakpoint, INT 4 Overflow trap, INT 5 print
- screen, etc... (Source: The Programmers PC Sourcebook 2nd Edition pg 4-5)
-
- To handle the hardware interrupts what happens is that the hardware interrupt
- has 8 added to it to become the software interrupt. e.g. Keyboard has a
- hardware IRQ 1 but has a software INT 9, COM1 has IRQ4 but INT 0Ch, etc...
- I believe with some programming of the Programmable Interupt Controller (PIC)
- you can change where the hardware interrupts go to in the software chain but
- I don't know why you would want to do that.
-
- The first 8 INT locations were set up by Intel so they really can't be
- changed. If you have any questions feel free to drop me a line.
-
- Later,
- --
- John Villalovos
- Certified Netware Engineer
- villalj@xanth.cs.orst.edu
- (503) 753-7883
-