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- Path: sparky!uunet!ogicse!news.u.washington.edu!stein.u.washington.edu!ivanw
- From: ivanw@stein.u.washington.edu (Ivan Wemple)
- Newsgroups: comp.lsi.cad
- Subject: netlist comparisons
- Message-ID: <1992Nov10.023646.2310@u.washington.edu>
- Date: 10 Nov 92 02:36:46 GMT
- Article-I.D.: u.1992Nov10.023646.2310
- Sender: news@u.washington.edu (USENET News System)
- Organization: University of Washington, Seattle
- Lines: 23
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-
-
- Hello all:
-
- I am in the process of debugging a piece of software
- which translates a flattened circuit simulator input
- netlist into a 'hierarchical' netlist (ie, one which
- contains subcircuit definitions and instances).
-
- Question:
-
- Is there a tool around which will compare two circuit
- simulation input files and determine if they are the
- same *topologically*?
-
- My current technique involves running lengthy hspice
- simulations and comparing the outputs... a long and
- tedious process.
-
- Thanks in advance!
-
- Ivan Wemple
- ivan@dtrl.ee.washington.edu
-