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- Newsgroups: comp.lang.vhdl
- Path: sparky!uunet!wupost!cs.utexas.edu!torn!nott!bnrgate!bcrka451!curry
- From: curry@bugsbunny.bnr.ca (Simon Curry)
- Subject: VIUF Conference Spring 1993
- Message-ID: <1992Nov13.135654.25918@bcrka451.bnr.ca>
- Followup-To: curry@bnr.ca
- Originator: curry@bcrkd11
- Keywords: vhdl, viuf
- Sender: 5E00 Corkstown News Server
- Organization: Bell Northern Research
- Date: Fri, 13 Nov 1992 13:56:54 GMT
- Lines: 80
-
-
- VHDL International Users' Forum
- Spring 1993 Conference
- Sponsored by VHDL International
-
- "Making VHDL a Commercial Reality"
- ==================================
-
-
- April 28 - 30, 1993
- Chateau Laurier Hotel
- Ottawa, Canada
- To be held immediately following the
- IFIP Conference on Hardware Description Languages (CHDL)
-
- The Conference
- --------------
- VHDL has emerged as the standard for performing high-level design and
- the recently-adopted changes in the language specification have helped
- fill the gaps in the original standard. Now, as more and more
- designers are becoming proficient at using an HDL-based design
- methodology and as EDA vendors' tools continue to mature, its
- popularity has grown beyond its roots as a DoD-mandated format.
-
- This edition of the bi-annual VIUF will focus on the commercial
- implementation of a VHDL-based design methodology. Participants will
- explore the issues, obstacles and benefits in using VHDL to design
- custom ICs, ASICs and systems in the context of the high-pressure
- electronics products industry.
-
- The conference will include an emphasis on users' experiences with
- VHDL for a broad range of applications.
-
- Technical Program
- -----------------
- Abstracts for presentations, panel discussions or user experience
- sessions are invited for (but not limited to) the following topics:
-
- o Timing issues in VHDL o F22 design experiences
- o VHDL synthesis and test synthesis o Using VHDL for architectural design
- o Solving the ASIC library challenge o Addressing simulation performance
- o Implementing VHDL `92 o Migrating from Verilog to VHDL
- o ASIC design with VHDL o Making VHDL easier to use
-
- Proposals for half-day tutorials covering VHDL modeling, VHDL from a
- manager's perspective and the use of VHDL in the design process are
- also invited.
-
- Participation
- -------------
- All interested parties are invited to attend and are encouraged to
- present issues and experiences on any of the topic areas.
- Participation by DoD program/contract managers, industry
- managers/project engineers, digital IC and systems designers, and tool
- developers is welcome. NOTE: If selected for presentation, a single
- camera-ready copy of each speaker's paper will be required for
- reproduction and distribution to all attendees.
-
- Response Dates
- --------------
- PAPERS DUE Jan. 15, 1993
- NOTIFICATION OF ACCEPTANCE Feb. 1, 1993
- *FINAL PAPERS DUE Mar. 12, 1993
-
- *Please note that this meeting requires complete papers to be included
- the conference proceedings.
-
- For more details
- ----------------
- Conference chair Program chair Tutorials chair
- Victor Berman Simon Curry Paul Menchini
- Cadence Design Systems Bell Northern Research CLSI Solutions
- 2 Lowell Research Ctr. Dr. PO Box 3511, Station C 2 Davis Drive
- Lowell, MA 01852 Ottawa, Ontario RTP, NC 27709
- Canada K1Y 4H7
- (508) 934-0276 (613) 763-2981 (919) 990-9506
- (508) 441-1109 fax (613) 763-7241 fax (919) 990-8561 fax
- berman@cadence.com curry@bnr.ca mench@clsi.com
-
-
-