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- From: chased@rbbb.Eng.Sun.COM (David Chase)
- Newsgroups: comp.arch,comp.lang.forth
- Subject: Re: What's RIGHT with stack machines
- Date: 12 Nov 1992 19:33:38 GMT
- Organization: Sun Microsystems, Mt. View, Ca.
- Lines: 20
- Message-ID: <lg5cciINN17n@exodus.Eng.Sun.COM>
- References: <MIKE.92Nov9004026@guam.vlsivie.tuwien.ac.at> <id.D6UU.5Z@ferranti.com> <lg0eheINNs7l@exodus.Eng.Sun.COM> <id.Z9WU.QA1@ferranti.com>
- NNTP-Posting-Host: rbbb
-
- In article <id.Z9WU.QA1@ferranti.com> peter@ferranti.com (peter da silva) writes:
- >Of course, superscalar RISC machines with lots of pipelines are really terrible
- >at handling byte-code interpreters (lots of non-predictable branches) and run-
- >time code generation (OK, now we blow away the pipeline...). Oh, and the
- >infamous autoincrement deferred addressing mode becomes a major win...
-
- It ain't necessarily so. You can use speculative or non-faulting
- loads and multiple condition codes to pipeline the interpreter itself.
- This is not a panacea, but it's not a catastrophe. Not all RISCs have
- these (yet).
-
- It's also not clear to me that the stack machine will come with a
- simpler pipeline. Branches will probably be just as bad there, and
- your autoincrement deferred addressing mode looks like a big consumer
- of register file ports. Superscalar group or messy addressing modes,
- it's all the same in terms of hardware resources.
-
- David Chase
- Sun
-
-