home *** CD-ROM | disk | FTP | other *** search
- Path: sparky!uunet!auspex-gw!guy
- From: guy@Auspex.COM (Guy Harris)
- Newsgroups: comp.arch
- Subject: Re: RISC goes CISC?
- Message-ID: <15444@auspex-gw.auspex.com>
- Date: 12 Nov 92 00:47:54 GMT
- References: <15394@auspex-gw.auspex.com> <1992Nov11.011822.20226@labtam.labtam.oz.au> <BxKnK2.Aq0@exnet.co.uk>
- Sender: news@auspex-gw.auspex.com
- Organization: Auspex Systems, Santa Clara
- Lines: 16
- Nntp-Posting-Host: auspex.auspex.com
-
- >The i860 is going down the pan, but the new chip to be used by Intel
- >SSD and which will be x86-ish will have a new instruction set.
-
- "Will be x86-ish" and "will have a new instruction set"?
-
- Am I missing something here? Which will it be - x86-ish, with an x86
- instruction set, or not x86-ish, with a new instruction set?
-
- >This SSD chip is due in 1996. I wonder if it's really the Pentium?
-
- I've heard claims of a 64-bit member of the x86 family; *if* the chip
- has a new instruction set, perhaps they'll have the x86 instruction set
- as the 32-bit instruction set, and some new instruction set as the
- 64-bit instruction set.
-
- Doesn't sound like the Pentium, in any case.
-