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- Newsgroups: comp.arch
- Path: sparky!uunet!walter!gizmo!mo
- From: mo@gizmo.bellcore.com (Michael O'Dell)
- Subject: Re: RTX and SC32
- Message-ID: <1992Nov6.131717.15715@walter.bellcore.com>
- Keywords:
-
- Sender: news@walter.bellcore.com
- Nntp-Posting-Host: gizmo.bellcore.com
- Reply-To: mo@bellcore.com
- Organization: Center for Chaotic Repeatabilty
- References: <17131@mindlink.bc.ca> <1992Nov4.191038.12063@news.arc.nasa.gov> <1dcvsmINNiop@uniwa.uwa.edu.au>
- Date: Fri, 6 Nov 92 13:17:17 GMT
- Lines: 51
-
- "Stacks always go in memory, and you always go to the stack."
-
- Well, if you wanted a damning case against very fast stack machines,
- i can't imagine a better one than that.
-
- The simple reality is that processors get faster much more quickly than
- affordable memory components, hence the only way you can feed this new
- generation of blisteringly-quick processors (regardless of the
- architectural fru-fru) is to build a complex memory system (read this as
- EXPENSIVE by comparison to simple minis and workstations). The only way
- you can go fast is to avoid touching deathly-slow memories, and when you
- do, you gotta hack like hell to go as fast as possible. That's why fast
- RISC machines gotta be surrounded by (or contain) instruction caches with
- burst-fill (or something morally similar), and why they gotta have very
- clever data caches with all kinds of nifty tricks like out-of-order
- completion allowed, and/or deep write-buffer queues with associative
- bypass for fast back-filling, and such. If you touch memory, you lose,
- pure and simple. There is no way an Alpha instruction pipeline (to pick
- one at random) can go *LOTS* faster than an R2000 instruction pipe if it
- is forced to touch 80ns dynamic memory chips with the same frequency and
- with the same available memory bandwidth, ie, without a sophisticated
- memory subsystem in between somewhere.
-
- What does this have to do with Stack Machines?? LOTS. The biggest
- performance kicker in the Burroughs 7800 (come 7900) was
- the introduction of a largish (for the time and available technology)
- asynchronous stack-top cache. It helped performance dramatically.
- So, fast stack machines can play the memory system game - get
- themselves large stack-top caches and good instruction caches.
- (but don't forget what huge cache contexts do to context switch
- time and how fast the machine runs at one MIPS after a switch while
- the cache cold-starts). But the what happened to the simplicity,
- cheapness, and low transitor count?
-
- And more importantly, does it really go as fast???
-
- What I have not seen in the literature (which doesn't mean it doesn't
- exist, just that i haven't seen it) is a comparison of a stack machine
- design with the equivalent complexity budget of modern RISC machines
- to such modern processors. By complexity budget I mean one that spends
- as much logic on cache and memory system complexity as the fast RISC
- machines do. (including the related trickle-down complexity like
- dealing with out-of-order completion in the pipe, if required)
-
- Note that we may have an interesting data point in this discussion:
- the Hobbit may be close enough to this last model to be interesting.
- We'll have to wait and see.
-
- -Mike O'Dell
-
- Bellcore?? Bellcore isn't allowed opinions. Any found here are mine.
-