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- Newsgroups: comp.sys.ibm.pc.hardware
- Path: sparky!uunet!mcsun!sunic!aun.uninett.no!ugle.unit.no!sigyn.idt.unit.no!renebi
- From: renebi@idt.unit.no (Olaf Rene Birkeland)
- Subject: Re: 1x9 vs. 1x3 memory
- Message-ID: <1992Sep14.142638.17075@ugle.unit.no>
- Sender: news@ugle.unit.no (NetNews Administrator)
- Reply-To: renebi@idt.unit.no
- Organization: The Norwegian Institute of Technology
- References: <1992Sep9.180601.11141@unislc.uucp> <1992Sep11.164957.5227@ultb.isc.rit.edu> <1992Sep14.104243@cs.utwente.nl>
- Date: Mon, 14 Sep 92 14:26:38 GMT
- Lines: 28
-
- In article <1992Sep14.104243@cs.utwente.nl>, waardenb@cs.utwente.nl (Jerry van Waardenberg) writes:
- |>
- |> Sorry, but you're wrong! It does make a difference. Older type computers only
- |> refresh the first column of a memory chip. This works fine if all chips are 1
- |> Mbit (as the 9-chip 1 MB SIMMs). However, in 4 MB SIMMs, that have their memory
- |> lined up in 4 columns of 1 Mbit each, only the first column will be refreshed.
- |> The other columns will lose their data. So the newer 3-chip SIMMs can only be
- |> used in newer types of computers!
-
- Sorry, YOU are wrong. Memory refreshs are done on a ROW-basis. The
- clue is to access all row adresses within a limited amount of time.
- The four outputs of the 1Mx4 is *NOT* four columns, but outputs from
- four identical DRAM-matrixes. As long as the number of address lines
- on the chips are the same (0.5*LOG2(address range) = 10), the refresh
- is done properly. As most systems also uses the CAS-Before-RAS (CBR)
- refresh method this is also irrelevant. With CBR an internal row
- address counter in the DRAM is used, demanding only a certain refresh
- frequency. (Typically one refresh cycle every 0.016 ms, or 64 kHz)
-
- -Olaf Rene
-
- P.S. I DO NOT guarantee that this is correct, but I DO design with
- these things right now!
- --
- --------------------------------------------------------------
- Olaf Rene Birkeland e-mail: renebi@idt.unit.no
- The Norwegian Institute of Technology, University of Trondheim
- --------------------------------------------------------------
-