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- From: jewett@hpl-opus.hpl.hp.com (Bob Jewett)
- Date: Fri, 21 Aug 1992 17:32:20 GMT
- Subject: Re: Cheap RSA chips? (Was: Re: shift registers??)
- Message-ID: <65190021@hpl-opus.hpl.hp.com>
- Organization: HP Labs, High Speed Electronics Dept., Palo Alto, CA
- Path: sparky!uunet!cs.utexas.edu!sdd.hp.com!hpscdc!hplextra!hpl-opus!jewett
- Newsgroups: sci.crypt
- References: <1992Aug20.160528.2155@nessie.mcc.ac.uk>
- Lines: 23
-
- > You mean that one could implement RSA in hardware for a
- > reasonably low price?
-
- One can and several have. Below is a posting from 1986. 2-micron CMOS
- is a slow, cheap process now. A later French chip ran faster, I think,
- but I've misplaced the reference. Caution: some RSA encryption speeds
- are quoted for an exponent of 3. Decryption will usually be slower.
-
- Bob
-
- From the advance program for the Custom Integrated Circuits
- Conference, Rochester NY, May 12-15 1986, page 39:
-
- A Fast Asynchronous RSA Encryption Chip
-
- G. Orton, L.E. Peppard, S.E. Tavares, Queen's Univ., Kingston, Ontario,
- Canada
-
- This RSA key encryption chip uses asynchronous modulo multiplication
- to improve the throughput by a factor of 40 relative to a synchronous
- implementation. The chip is capable of an average throughput of
- 40 Kbit/sec for 512 bit encryption with a 2-micron CMOS process and a
- 1 square cm die area.
-