home *** CD-ROM | disk | FTP | other *** search
- Xref: sparky comp.sys.sun.misc:3719 comp.sys.sun.hardware:3900
- Newsgroups: comp.sys.sun.misc,comp.sys.sun.hardware
- Path: sparky!uunet!ocsmd!gumby!obi
- From: obi@gumby.ocs.com (Kuryan "Obi" Thomas)
- Subject: SPARC virtual to physical address translation
- Message-ID: <Bt3z0L.7K3@gumby.ocs.com>
- Sender: obi@gumby (Kuryan "Obi" Thomas)
- Reply-To: obi@gumby.ocs.com
- Organization: Online Computer Systems, Inc.
- Date: Mon, 17 Aug 1992 03:29:08 GMT
- Lines: 29
-
- Would some kind netperson please explain (by email if possible) how 32-bit
- virtual addresses are translated into physical addresses using the SPARC
- "reference MMU," whatever that is? I understand there is a two-level
- translation scheme, using a segment map and a page map. There's also
- something called a "context register." I'm clueless beyond this point.
-
- What I'd like to know specifically is:
-
- 1. What is the context register? Is it something that establishes how a
- particular process's virtual addresses are translated to physical?
-
- 2. How does the two-level translation take place?
-
- 3. What is the segment map? The page map? What is a page map entry group
- (PMEG) and why are page map entries grouped?
-
- 4. How are the 32 bits of a virtual address mapped to 32 bits of physical
- address? (E.g., the low-order 12 bits is the offset in a page, the next
- 5 bits are the page number...that sort of thing).
-
- 5. Any other nuggets of info you care to share.
-
- I'm just a curious user, so any level of detail and partial answers are
- welcome. I've been reading some of the papers in "The SPARC Technical
- Papers," (Springer-Verlag 1991) and I'm now more confused than I was
- before.
-
- Thank you for any and all responses. I'll post a summary if there's enough
- excitement.
-