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- Path: sparky!uunet!decwrl!ditka!ntg!rosie!next.com
- From: John_Graves@next.com (John Graves)
- Newsgroups: comp.sys.next.hardware
- Subject: Re: Upgrade to NextTurbo
- Message-ID: <4577@rosie.NeXT.COM>
- Date: 10 Aug 92 16:31:28 GMT
- References: <dillon.0l2a@overload.Berkeley.CA.US>
- Sender: news@NeXT.COM
- Reply-To: John_Graves@next.com
- Lines: 33
-
- In article <dillon.0l2a@overload.Berkeley.CA.US> dillon@overload.Berkeley.CA.US
- (Matthew Dillon) writes:
- > In article <1992Aug9.000205.2536@cs.yale.edu> nathan@laplace.biology.yale.edu
- (Nathan F. Janette) writes:
- > >In article <1992Aug7.213354.15427@eagle.lerc.nasa.gov>
- > >...
- > >
- > >Use 72-pin 4, 8, 16, or 32 MB SIMMs with 100 ns minimum
- > >access time. For maximum performance use 70 ns SIMMs.
- >
- >
- > I never understood this, if the dram bus is setup to work with 80ns
- > SIMMS, why would putting in 70ns SIMMs give you better performance?
- > The ram's might be faster but I seriously doubt the NeXT will access
- > them any faster.
- >
- > -Matt
-
- The memory system has programmable memory timing such that the number of
- processor clocks needed to access a given amount of data can be tailored to the
- speed of the memory installed. 70 ns memory is just enough faster than 80 ns
- memory to allow the cpu to access the data with fewer clock cycles. This
- improves memory system performance.
-
- "70 ns" memory is faster than "80 ns" memory in many parameters other than just
- RAS access time. The faster CAS access time in particular allows the memory
- system to respond quicker to burst (16 bytes) bus transfers.
-
- --
-
- John Graves
- Hardware Engineering
- NeXT Computer, Inc
-