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- Path: sparky!uunet!cs.utexas.edu!news-is-not-mail
- From: newton@cs.utexas.edu (Peter Newton)
- Newsgroups: comp.sys.mac.misc
- Subject: Re: Information on: The IIvi, IIvx, and Performa 600
- Date: 16 Aug 1992 20:43:11 -0500
- Organization: CS Dept, University of Texas at Austin
- Lines: 20
- Message-ID: <16n07fINN71l@mohawk.cs.utexas.edu>
- References: <1992Aug16.210017.1816@risky.ecs.umass.edu>
- NNTP-Posting-Host: mohawk.cs.utexas.edu
-
- > The bandwidth of the memory bus is really not critical in personal
- > computers, 'cause other bottlenecks hold things up before the bus
- > width does.
-
- I cannot completely agree. In the case of the LC II versus the IIsi,
- it depends on the program. Some programs will show little difference.
- Others will show none. It can be hard to predict. I have compiled
- and run the dhrystone 2.0 benchmark on the Classic II (16 MHz 16 bit bus)
- and the IIsi (20 MHz and 32 bit bus). Think C compiled with 4-byte ints.
- Compiled to use only 68000 instructions, the IIsi is 1.9 times faster.
- Compiled to use 68020 instructions, the IIsi is 1.5 times faster. The
- clock speed account for a factor of 1.25.
-
- I think it is wise to actually measure things, but it is tricky. Results
- can depend on lots of things. For example, a program that spends all
- of its time in a tight loop that fits i cache will be unaffected by bus
- width.
- --
- ----
- Peter Newton (newton@cs.utexas.edu)
-