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- Newsgroups: comp.sys.hp
- Path: sparky!uunet!paladin.american.edu!darwin.sura.net!mips!sdd.hp.com!hpscdc!cupnews0.cup.hp.com!lamont
- From: lamont@cup.hp.com (LaMont Jones)
- Subject: Re: PA assmembly to get current PC-offset (CR18)
- Sender: news@cupnews0.cup.hp.com
- Message-ID: <BtCo4L.H0q@cup.hp.com>
- Date: Fri, 21 Aug 1992 20:12:21 GMT
- References: <2787@tivoli.UUCP>
- Organization: Hewlett-Packard
- X-Newsreader: Tin 1.1lj PL5
- Lines: 45
-
- Stuart Jarriel (stuart@TIVOLI.COM) wrote:
- : I am trying to unwind the stack and need the PC-Offset register.
- : Of course MFCTL 18,28 wont do it since you must be at the
- : most priviledged level to do a MFCTL for most control registers.
-
- Even if you could read CR17 & CR18 (iiaqs & iiaqo), it is not guaranteed
- to track PC (The closest I can come to a definition is:
- The queues generally contain the addresses ... of the two instructions
- in the IA queues at the time of the interruption.
-
- The IIA queues are continually updated whenever the PSW Q-bit is 1 and
- are frozen by an interruption (PSW Q-bit becomes 0). After such an
- interruption, the IIA queues contain copies of the IA queues.
-
- (PA-RISC 1.1 Architecture and Instruction Set, page 2-14)
-
- Note that it does not say where in the pipe the registers are updated...
-
- : I have never messed with privledges before, does anyone have an
- : example of how to do that?
-
- All user code on hp-ux runs at privilege ring 3. Kernel code runs at
- privilege ring 0.
-
- : All I really want is PC-offset. PC-space is much easier (mfsp sr4,r20).
-
- If you are coding this in C, you will be calling an assembly language
- routine to get your PC offset. Since the PC offset of the return point
- of the call is stuffed in %rp by the caller, this routine is most easily
- coded as:
-
- .code
- .proc
- .callinfo
- get_my_pcofs
- bv 0(%rp)
- copy %rp,%ret0
- .procend
-
- If you are coding in assembly, then the 'bl' instruction can be used to
- get your PC offset. 'bl .+8,%r19' will place 8 more than the address of
- the bl instruction (with a 3 in the low 2 bits) into r19 without disturbing
- the flow of the code.
-
- lamont
-