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Internet Message Format  |  1992-08-13  |  1.4 KB
  1. Path: sparky!uunet!imp!ferrari!rolls!alex
  2. From: alex@rolls.dsp.hellnet.org (Alexander Meidel)
  3. Newsgroups: comp.lsi
  4. Subject: Off-chip circuits problems
  5. Keywords: VLSI
  6. Message-ID: <108@ferrari.dsp.hellnet.org>
  7. Date: 12 Aug 92 09:06:34 GMT
  8. Sender: news@ferrari.dsp.hellnet.org
  9. Followup-To: alex@dsp.hellnet.org
  10. Organization: DSP Semiconductors, Israel.
  11. Lines: 28
  12. Nntp-Posting-Host: rolls
  13.  
  14.  
  15.  Hi!
  16.  
  17.   I am a circuit engineer. I make design of off-chip drivers, 
  18. reciever circuits, using ready Input PAD Protection.
  19. I have a problem when power supply of chip - 3.3 v, and the 
  20. high level of input sygnals is 5 v. The problem is how to
  21. reduce input sygnal ( level shifting ) to 3.3 v inside the 
  22. chip in the area of Input PAD Protection. I am afraid of 
  23. parasitics bipolar transistors or  lacht-up or punchthrough 
  24. problems.
  25. Is the simple transfer gate on n-type transistor good solution ?
  26.  
  27.  
  28. Thank for advance.
  29.  
  30. ----------------------------------------------------------------
  31.  
  32.  
  33.                                            |    _    _  _
  34.      /\       _  -                         |   | \  /   | \ 
  35.   - /\ \/|\/||_|/ \                        |   |  | |_  |__|
  36.   \/--- \|  ||_/\_ |                       |   |  /   \ |  
  37.                                            |   |_/  __/ |
  38. If at first you don't  succeed,            |
  39. redefine success.                          | 
  40.    -- Dick Brandon                         |
  41. ________________________________________________________________
  42.