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- Path: sparky!uunet!mcsun!uknet!axion!micromuse!exnet!dhd
- From: dhd@exnet.co.uk (Damon)
- Newsgroups: comp.arch
- Subject: Re: Die aspect ratio.
- Message-ID: <Bt1JwF.6r3@exnet.co.uk>
- Date: 15 Aug 92 20:07:26 GMT
- References: <16edveINN7or@agate.berkeley.edu>
- Organization: ExNet Systems Ltd Public Access News, London, UK
- Lines: 35
-
- In article <16edveINN7or@agate.berkeley.edu> krste@ICSI.Berkeley.EDU (Krste Asanovic) writes:
- >
- >I've a few questions for the VLSI hackers out in industry.
- >
- >Sun in particular with the Viking, the cache controller, and the
- >SPARC90, have produced many exactly square die recently. Also, there
- >were quite a few other chips at this year's Hot Chips that were
- >exactly square (or at least to the nearest 0.1mm).
- >
- >It seems unlikely that an irregular design such as a processor or
- >cache controller would map naturally to a square die floorplan. Is
- >there some inherent yield or manufacturability advantage to having a
- >square die? I can think of reticle size and maybe efficient wafer
- >tiling as two reasons.
-
- Connections will, on average, be shorter. Routing might be easier.
- The mfr might not need all the space for contact pads. Heat transfer
- might be better.
-
- >Rectangular die give more perimeter per unit area if a design is pad
- >limited. What's the largest sensible/known aspect ratio? (We've done
- >one processor die with an aspect ratio of 2.3:1).
-
- I guess a long thin chip can suit some types of routing (river
- routing?), but may make the die more prone to thermal stresses from
- temperature gradients.
-
- Please someone correct my wild and untrained thoughts here...
-
- Damon
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