NetNews Usenet Archive 1992 #18/NN_1992_18.iso/spool/comp/arch/8855

Internet Message Format | 1992-08-12 | 1.6 KB

Path: sparky!uunet!caen!hellgate.utah.edu!cc.usu.edu!ivie
From: [e-mail] (CP/M lives!)
Newsgroups: comp.arch
Subject: Re: PALcode instructions vs TRAP instructions
Message-ID: <[e-mail]>
Date: 12 Aug 92 09:22:11 MDT
References: <[e-mail]> <[e-mail]>
Organization: Utah State University
Lines: 24

In article <[e-mail]>, [e-mail] (Reinhard Kirchner) writes:
>
> Access, and change of it, by system software might be possible by catching
> requests of page table changes and preventing write access to those pages.
> But doesn't this slow down the system? Every access to the page tables,
> which happens quite frequently, has to checked.
>
Not really. The OS will believe the console code about how much memory is
available. The console reports the memory size as smaller than physical by
the amount of memory needed for the PALcode and the console. The OS will not
try to use the memory thus reserved for PALcode.

> I also could not find in the Alpha architecture handbook a flag about PALcode
> state. There may be one on the chip, but not as part of the architecture.
>
That's part of the software architecture, not the hardware architecture, and
isn't covered by the book. You'll probably have to buy the Alpha VMS Internals
book (haven't seen it yet) to find this sort of stuff. The PALcode section of
the Alpha Architecture Manual talks about lots of things that are part of the
software architecture; such as VMS PALcodes manipulating the "stack" (Alpha
doesn't have one).

Roger Ivie
[e-mail]