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- Newsgroups: comp.arch
- Path: sparky!uunet!ferkel.ucsb.edu!taco!gatech!willis1.cis.uab.edu!hyatt
- From: hyatt@cis.uab.edu (Robert Hyatt)
- Subject: Re: Need references on architecural comparison
- Message-ID: <1993Jan27.015900.10505@cis.uab.edu>
- Organization: University of Alabama at Birmingham
- References: <1993Jan26.234628.23217@zip.eecs.umich.edu>
- Date: Wed, 27 Jan 1993 01:59:00 GMT
- Lines: 19
-
- In article <1993Jan26.234628.23217@zip.eecs.umich.edu> ashish@blueridge.eecs.umich.edu (Ashish Mehra) writes:
- >
- >I would appreciate if the knowledgable amongst you
- >can give me some pointers to articles on architectural
- >comparisons focusing on context switching overhead and
- >interrupt response time. Relevant processor architectures
- >are the R2000/3000, SPARC, 68030/40 and 486. Also,
- >is there any study done that compared the _relative_
- >performance gains of a synchronization instruction
- >like test-and-set over pure software mechanisms?
- >
-
- What is a "pure software mechanism"??? Assuming you are implementing
- a lock for multiprocessors, I haven't seen a pure software approach that
- will work.....
-
- --
- !Robert Hyatt Computer and Information Sciences !
- !hyatt@cis.uab.edu University of Alabama at Birmingham !
-