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- Newsgroups: comp.sys.intel
- Path: sparky!dsndata!backbone!backbone!wayne
- From: wayne@backbone.uucp (Wayne Schlitt)
- Subject: Re: 486SL dropped, vendors test Cyrix
- In-Reply-To: hm@opus40.ix.de's message of Thu, 7 Jan 1993 17: 42:11 GMT
- Message-ID: <WAYNE.93Jan7202412@backbone.uucp>
- Sender: wayne@backbone (Wayne Schlitt)
- Organization: The Backbone Cabal
- References: <1993Jan4.155415.2710@crd.ge.com> <C0E0zB.DwG@inews.Intel.COM>
- <1993Jan6.124308.21857@grebyn.com> <1993Jan7.174211.27473@opus40.ix.de>
- Date: Fri, 8 Jan 1993 02:24:12 GMT
-
- In article <1993Jan7.174211.27473@opus40.ix.de> hm@opus40.ix.de (Harald Milz) writes:
- >
- > |> The Cyrix 486SLC has a 386SX pinout, which means it has a 16 bit data
- > |> bus. [ rest of accurate discription of the Cyrix chip deleted ]
- >
- > Actually, I think, the 486SLC is an optimized 386 with this small cache.
- > The only reason for naming it 486 is marketing.
-
-
- Actually, I think, the *Intel* 486 is an optimized 386 with this small cache.
- The only reason for naming it 486 is marketing.
-
-
- Really.
-
-
- Architecturally, the 386 and the 486 are _very_ similar. The
- implementations are very different, but I guess you could just call it
- an "optimization" of the architecture.
-
-
- The Cyrix chip implements _all_ 486 specific instructions and _all_
- 486 specific flags. From the software's point of view, there have
- been Intel chips that differ more significantly between *mask revisions*
- that the differences between the Cyrix and Intel chips. (The 386
- 32-bit multiply bug comes to mind).
-
-
- -wayne
-
-