home *** CD-ROM | disk | FTP | other *** search
- Path: sparky!uunet!olivea!charnel!sifon!homer.cs.mcgill.ca!samurai
- From: samurai@cs.mcgill.ca (Darcy BROCKBANK)
- Newsgroups: comp.sys.next.advocacy
- Subject: Re: 100 Mips Intel NeXT (processor comparison)
- Message-ID: <BzvJys.CwD@cs.mcgill.ca>
- Date: 26 Dec 92 16:18:27 GMT
- References: <1992Dec23.192238.18955@kong.gsfc.nasa.gov> <1992Dec24.190008.25875@ohsu.edu>
- Sender: news@cs.mcgill.ca (Netnews Administrator)
- Organization: SOCS - Mcgill University, Montreal, Canada
- Lines: 23
-
- In article <1992Dec24.190008.25875@ohsu.edu> filibert@ohsu.edu writes:
- >In article <1992Dec23.192238.18955@kong.gsfc.nasa.gov>
- >vesper@kong.gsfc.nasa.gov (Greg Vesper - RMS) writes:
- >> >
- >> > A little commentary....
- >> >
- >>
- >> Your commentary is out of date. Look at the NEW new HP's. ie the 735 and
- >755.
- >> They beat the alpha's, and at only 99 MHZ - alpha is good, but PA RISC is
- >> better..
- >
-
-
- Can someone tell me how main memory is expected to function with
- 99 - 200 MHz chips?
-
- I don't think that 10ns main memory is quite the norm yet, so won't
- these wound-up processors spend most of their time waiting?
-
- How do they get around this?
-
- - db
-