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- Newsgroups: comp.sys.mac.hardware
- Path: sparky!uunet!think.com!enterpoop.mit.edu!mojo.eng.umd.edu!russotto
- From: russotto@eng.umd.edu (Matthew T. Russotto)
- Subject: Re: P5 v. PowerPC (WAS: Where the mac really wins)
- Message-ID: <1993Jan03.040217.21748@eng.umd.edu>
- Date: Sun, 03 Jan 93 04:02:17 GMT
- Organization: Project GLUE, University of Maryland, College Park
- References: <Bzx997.FMz@jfwhome.FUNHOUSE.COM> <C08vn0.5nI@rahul.net>
- Lines: 25
-
- In article <C08vn0.5nI@rahul.net> jonathan@mecca.epri.com writes:
- >John F. Woods (jfw@jfwhome.FUNHOUSE.COM) wrote:
- >
- >> It occurs to me that another technical glitch the Alpha presents may have
- >> been more significant -- the Alpha is a 64 bit chip (I assume PowerPC is
- >> 32 bits), and there's a lot more code that stumbles over data-*size* problems
- >> than byte-order; the Berkeley networking code will again show lots of
- >
- > I would hope that the PowerPC is a 64bit chip. Otherwise it won't stand a
- >chance in competition with workstation class machines; even the lower end
- >ones.
-
- If it's similiar to the existing POWER chips, the fixed point unit has
- 32-bit registers, the floating point unit has 64 bit registers, and
- it allows a real address space of 2^32 bits (virtual address space of
- 2^56 bits). Looks like a 32 bit architecture to me.
-
- (and the current POWERStations seem to be standing a chance....)
-
-
- --
- Matthew T. Russotto russotto@eng.umd.edu russotto@wam.umd.edu
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