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- Path: sparky!uunet!munnari.oz.au!jabaru.cec.edu.au!csource!gateway
- From: Craig.Orr@f263.n633.z3.fidonet.org (Craig Orr)
- Newsgroups: comp.sys.ibm.pc.hardware
- Subject: Programming OPTI motherboard chipset?
- Message-ID: <725996378.AA08629@csource.oz.au>
- Date: Thu, 31 Dec 1992 09:17:00
- Sender: gateway@csource.oz.au
- Lines: 89
-
- > From: antony@werple.apana.org.au (Antony Suter)
- > Organization: werple public-access unix, Melbourne
-
- > I have a 386/40 motherboard with an OPTI chipset. My
- > AMI bios is the
- > latest type yet seems to be an early version of this
- > type (ie. the
- > Advanced BIOS). My BIOS doesnt give me the option of
- > running my ISA
- > bus at anything other than 8MHz.
-
- > Can someone tell my how to program the chipset to
- > change the bus speed?
-
- > (from memory its the 381/382 chipset,
- > the cache is Write Back.)
-
- Firstly... 8MHz is the recommended BUS Speed, Use above this frequency
- could/will cause instability and potential/probable data loss!
-
- I Don't have the programming manual for the 381/382, but I
- do have the 281/2 manual. They may be similar...
-
- Quoting Relevent Sections...
-
- An Indexing scheme is used to access all the registers. Port 22H is used as an
- indexing register and port 24H is used as the data register. Every access to
- port 24H must be preceeded by a write to port 22H even if the same register
- data is being access again. All reserved bits are set to zero by default.
-
- blah blah blah
-
- Now... This is where incompatibility might occur 8^) 'cause from memory the
- 381/2 support more ATCLK speeds than the 281/2, but still...
-
- Index 14H - Misc. Control Register
-
- Bit Function Default
-
- 0 ATCLK (Bus Speed) Select 0
- 0 = CPUCLK / 6
- 1 = CPUCLK / 4
- 1 Enable Turbo Switch 0
- 0 = Disabled
- 1 = Enabled
- 2 Slow Refresh Mode 0
- 0 = 15.9 microsecs
- 1 = 95.5 microsecs
- (I tried this once, the system really
- speeds up, but floppies slow down to
- a crawl)
- 3 Reserved 0
- 4 Fast NMI Request 0
- 5 Master Byte Swap Enable 0
- 6 Keyboard Reset Control 0
- 1=Execute HLT before Chipset will
- generate a CPU RESET from keyboard
- controller (ie: Gate A20)
- 7 Znith Mode Enable 0
- 1=allow F0000H-F0FFFH to be
- written whislt write protect is
- turned on
-
-
- Sorry that the info isn't exactly as required, I have reqested later chipset
- documents and will see what comes in.
-
- Until then this might help, my guess is that they use the reserved bit, or have
- reorganised the structure a little.
-
- Can anyone else make comments to enlighten?
-
- One Other Hint... As almost ALL motherboards based on Opti Chipset are the
- DemoBoard Layout each and every other manufacters BIOS should work on your
- machine, It's just a matter of finding one with the options you want enabled!
- Find a supplier who sells
- Opti Motherboards and try to BUY/BORROW one of their BIOS's. It should work!
-
- Another Hint... Find a person who has a copy of AMIBCP (AMI BIOS Control
- Program) and get them to rewrite your BIOS after enabeling the missing
- settings. I have noticed that all AMI BIOS's have ALL the settings, but each
- and every manufacturer of Motherboards who uses AMI BIOS chips is able to turn
- on or off each and every feature in the BIOS!!!
-
-
- Craig Orr
- Of Course All standard disclaimers apply to this information!
-
- * Origin: Datamini Compubus BBS - 61-3-569-1164 - (3:633/263)
-