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- Newsgroups: comp.sys.ibm.pc.hardware
- Path: sparky!uunet!zaphod.mps.ohio-state.edu!sdd.hp.com!hp-cv!hp-pcd!hpcvca!hpcvccl.cv.hp.com!scott
- From: scott@hpcvccl.cv.hp.com (Scott Linn)
- Subject: Re: What's the deal? My chip says "SX-25"; Norton says "SX-33"
- Message-ID: <1992Dec30.014027.15577@hpcvca.cv.hp.com>
- Sender: nobody@hpcvca.cv.hp.com
- Nntp-Posting-Host: hpcvccl.cv.hp.com
- Organization: Hewlett-Packard Company, Corvallis, Oregon USA
- References: <C01LuI.542@news.cso.uiuc.edu>
- Date: Wed, 30 Dec 1992 01:40:27 GMT
- Lines: 21
-
- (Mike Berger) writes:
- : Do you have any reason to believe this is really the case? It would be
- : very costly for Intel to test ALL chips. Usually they're sampled from
- : batches. If one sample chip fails at the higher speed and passes at the
- : lower speed, then the whole batch is designated for the lower speed. So
- : chances are good that some will function at faster clock speeds.
-
- You can't do this. Chip speed varies across single wafers, let alone across
- an entire wafer lot. They *all* need to be tested, and all at speed.
- Otherwise, you stand a good chance of shipping garbage.
-
- The usual route is exactly as Danny had stated: test every part at 33MHz.
- If it fails, test it at 25. If it fails, keep going down until you are
- out of speed.
-
- Note that you can put slow tests up front, to get functional testing out
- of the way, so that you don't have to repeat many of the tests if you start
- falling through the bins.
-
- Scott Linn
- scott@hpcvccl.cv.hp.com
-