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- Newsgroups: comp.sys.ibm.pc.hardware
- Path: sparky!uunet!haven.umd.edu!darwin.sura.net!spool.mu.edu!agate!linus!linus.mitre.org!jcmorris
- From: jcmorris@mwunix.mitre.org (Joe Morris)
- Subject: Re: power good line from PS: what does it do
- Message-ID: <jcmorris.725058714@mwunix>
- Sender: news@linus.mitre.org (News Service)
- Nntp-Posting-Host: mwunix.mitre.org
- Organization: The MITRE Corporation
- References: <92Dec22.181538.30517@acs.ucalgary.ca>
- Date: Tue, 22 Dec 1992 21:11:54 GMT
- Lines: 29
-
- titus@smith.phys.ucalgary.ca (Titus Mathews) writes:
-
- >Hi! I would like to know what effect the "power good" line from the
- >power supply has on the PC. Specifically, I want to know how toggling
- >this line differs from the pushing the reset button (I am told that
- >the PC resets if the power good line goes low).
-
- You've effectively answered your own question: the reset button forces
- the power-good line low; when you release the reset button the rise
- of power-good starts a cold boot. Some brute-force reset button hacks
- just short the line to ground; the fancy ones disconnect the line from
- the power supply, and have debouncing and such, but in effect they're
- all the same.
-
- Officially, "power good" is a report from the power supply that its output
- voltages are within specifications:
-
- +5 V line > +4.5 V
- +12 V line > +10.8 V
- -12 V line < -10.2 V (or should that be ">" ?)
-
- It's generally used only to drive the RESET pin on the master oscillator
- chip (typically an 82284 but who knows what on the modern SLT system
- boards?), where it's transformed into the onboard logic of + and -
- reset and distributed where it's needed. The spec for it is that it
- needs to be able to source 100 uA and sink 1 mA. (These specs from
- the PS/2-50 hardware manual.)
-
- Joe Morris / MITRE
-