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- From: John.S.Erickson@dartmouth.edu (John S. Erickson)
- Newsgroups: comp.sys.mac.hardware
- Subject: Building 32MHz LC Accelerator --- Arch. Questions!!!
- Message-ID: <1992Dec17.194553.19234@dartvax.dartmouth.edu>
- Date: 17 Dec 92 19:45:53 GMT
- Sender: news@dartvax.dartmouth.edu (The News Manager)
- Organization: Dartmouth College, Hanover, NH
- Lines: 43
- X-Posted-From: InterNews1.0a5@newshost.dartmouth.edu
-
- Hi!
-
- I'm working on an '030/'882-based, 32MHz accelerator for my
- LC, with cache. I've got a few questions for the BitWackers
- amongst you...
-
- (1) The PDS on the LC is 32 bits, but the path to memory is 16.
- While I *could* play some crazy games where the '030, the '882,
- and the cache are full width but feed the bus only 16, it seems
- a helluva lot easier simply to configure the board for 16 and
- live with just the raw speedup. Does this make sense? The issue
- is simply that with a large enough external cache and full 32-bit
- width on the accelerator, this thing would REALLY crank...
-
- (2) How do I deal with the difference between my 32MHz clock and
- and the logic board's 16MHz? That might sound silly, but the fact
- that the V8, 85C80 and other logic expects to see 16MHz can't be
- denied...
-
- (3) The STOOpidest question of all: How take the '020 out of the
- action? Is it as simple as sitting on the /HALT?
-
- (4) Is there anything sneaky that I'll have to do RE: the ROM? I'm
- thinking specifically of how the OS figures out what's in there,
- so that when apps run Gestalt to check what's in there they get
- the right answer...
-
- I should be able to do everything with a bunch of SRAMs, a bunch
- of PALs (say, 22V10) and maybe a couple other SSI chips. Oh yeah,
- the '030 and '882! Your thoughts???
-
- Nobody ask why I don't just *BUY* one --- I've got the important
- chips and the PCB technology...
-
- Have a GREAT one!
-
- John Erickson
-
- John.Erickson@dartmouth.edu
- Thayer School of Engineering
- Dartmouth College
- Hanover, NH 03755
- 802-649-5216
-