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  1. Xref: sparky comp.sys.amiga.programmer:17621 comp.sys.amiga.hardware:21874
  2. Newsgroups: comp.sys.amiga.programmer,comp.sys.amiga.hardware
  3. Path: sparky!uunet!spool.mu.edu!nigel.msen.com!math.fu-berlin.de!news.netmbx.de!Germany.EU.net!mpifr-bonn.mpg.de!specklec.mpifr-bonn.mpg.de!mlelstv
  4. From: mlelstv@specklec.mpifr-bonn.mpg.de (Michael van Elst)
  5. Subject: Re: CISC and RISC
  6. Message-ID: <1992Dec19.194550.11598@mpifr-bonn.mpg.de>
  7. Sender: news@mpifr-bonn.mpg.de
  8. Nntp-Posting-Host: specklec
  9. Organization: Max-Planck-Institut f"ur Radioastronomie
  10. References: <amipb.04wr@amipb.gna.org> <37844@cbmvax.commodore.com> <Bz8FD1.Dxt@ns1.nodak.edu> <BzByvD.FA9@news.cs.andrews.edu> <1gnl0mINNpq2@crcnis1.unl.edu> <1992Dec16.185521.21232@ichips.intel.com>
  11. Date: Sat, 19 Dec 1992 19:45:50 GMT
  12. Lines: 12
  13.  
  14. In <1992Dec16.185521.21232@ichips.intel.com> tjehl@sedona.intel.com (Timothy Jehl) writes:
  15. >   There is one (and only one) reason for RISC processors : clock speed.
  16.  
  17. There's a second one: chip size. Highspeed RISC chips can be still be
  18. small and thus cheaper to produce than same-performance CISC chips.
  19.  
  20. Regards,
  21. -- 
  22. Michael van Elst
  23. UUCP:     universe!local-cluster!milky-way!sol!earth!uunet!unido!mpirbn!p554mve
  24. Internet: p554mve@mpirbn.mpifr-bonn.mpg.de
  25.                                 "A potential Snark may lurk in every tree."
  26.