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- Newsgroups: comp.lsi.cad
- Path: sparky!uunet!think.com!yale.edu!jvnc.net!gmd.de!sylt!freier
- From: freier@gmd.de (Bernd Freier)
- Subject: Re: Magic transistor netlists
- Message-ID: <1992Dec14.094932.14170@gmd.de>
- Sender: news@gmd.de (USENET News)
- Nntp-Posting-Host: sylt
- Reply-To: freier@gmd.de
- Organization: Sun Microsystems, Inc.
- References: <1gben3INNal2@usenet.pa.dec.com>
- Date: Mon, 14 Dec 1992 09:49:32 GMT
- Lines: 17
-
- In article 1gben3INNal2@usenet.pa.dec.com, mayo@pa.dec.com (Bob Mayo) writes:
- > In article <1992Dec11.120248.425@gmd.de> huebner@eissn5.gmd.de writes:
- > >Hi netters,
- > >Does anybody know what the next line produced by magic means???
- > >Ok, I know it's a line of a transistor netlist. But where are
- > >the source gate drain and bulk nodes?
- > >
- > >p bsp.ch.2_0/I10 bsp.row_2_0/aoi21s_0/6_4_86# bsp.row_2_0/fts_0/Vdd 2 29 51 60
- >
- > See the file ~cad/src/magic/doc/man/sim.5 for a specification of the .sim
- > file format.
- >
- > --Bob
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