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- Path: sparky!uunet!stanford.edu!apple!tim
- From: tim@Apple.COM (Tim Olson)
- Newsgroups: comp.arch
- Subject: Re: RISC assemblers question
- Message-ID: <75756@apple.apple.COM>
- Date: 18 Dec 92 21:51:57 GMT
- References: <Dec.17.10.16.36.1992.17493@cadenza.rutgers.edu>
- Organization: Apple Computer Inc, Cupertino, CA
- Lines: 18
-
- In article <Dec.17.10.16.36.1992.17493@cadenza.rutgers.edu> masticol@cadenza.rutgers.edu (Steve Masticola) writes:
-
- |I've met a couple of people who have attempted to write assemblers for
- |RISC machines, who say that it's a difficult job. Can someone give me
- |an inkling as to why?
-
- From my experience, it's just the opposite. RISC processors tend to
- have a few simple instruction formats, fixed fields, etc. Also, with
- the limited number of addressing modes in RISC processors, parsing
- becomes almost trivial.
-
-
-
-
- --
- -- Tim Olson
- Apple Computer Inc. / Somerset
- (tim@apple.com)
-