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- Newsgroups: comp.arch
- Path: sparky!uunet!zaphod.mps.ohio-state.edu!cs.utexas.edu!wotan.compaq.com!twisto.eng.hou.compaq.com!croatia.eng.hou.compaq.com!leigh
- From: leigh@croatia.eng.hou.compaq.com (Kevin Leigh)
- Subject: Re: [Anet: Compaq Proposal]
- Message-ID: <1992Dec17.192509.18453@twisto.eng.hou.compaq.com>
- Sender: news@twisto.eng.hou.compaq.com (Netnews Account)
- Organization: Compaq Computer Corp.
- Date: Thu, 17 Dec 1992 19:25:09 GMT
- Lines: 101
-
- >From twisto.eng.hou.compaq.com!wotan.compaq.com!cs.utexas.edu!uunet!haven.umd.edu!wam.umd.edu!rsrodger Wed Dec 16 15:10:33 CST 1992
-
- >In article <1992Dec15.205639.25591@super.org> rminnich@super.org (Ronald G Minnich) writes:
- >>In article <1992Dec15.194637.10009@eng.umd.edu> sysmgr@king.eng.umd.edu writes:
- >>>You guys ever thought of licensing TurboChannel from DEC and building a
- >>>Pentium box/server around it?
- >>
- >>TurboChannel is a dog.
- >>
- >>Actually, seems to me they could look at SCI. Except they want low cost.
- >>But if the CMOS chips for SCI pan out, maybe they will meet the cost
- >>range.
- >
- > How about QuikRing (Apple)?
- >
- > <No flames, please--all I've seen is the hype and none of the
- > commentary--is there anything there besides hype and computer
- > mags babbling happily?>
- >
-
- QuickRing is Apple's highspeed I/O solution and it is a derivative of
- SCI. Our rational behind Anet is very much in-line with SCI guys',
- except we wanted a solution that will be
- A. for I/O (we don't want to carry the coherency bag)
- B. useable for portables, desktops and servers
- (that means very few devices to a LOT of devices, consistent
- physical layer of add-ins and scaleable performance [see next bullet])
- C. standard reasonably high performance and scaleable without changing
- the physical interconnects (an I/O device should work anywhere within
- the I/O boundary regardless of the system type)
- D. cheap for system OEMs, IHVs and eventually for the users
- (that means high-volume, low pin-count, minimize burdens, leverage
- off today's low-cost technologies and utilizing future technologies
- should minimize any "damages")
-
- I think SCI is neat for CPU/memory interconnects and I have a lot of
- respect on SCI guys to come up with IEEE P1596.
-
- In the PC arena...
-
- We have seen "fixes" such as the Data Translation bus on PC addin cards
- to achieve higher bandwidth by going around or adding another
- "high-speed" path to an existing path. I think QuickRing is a quick fix.
- Don't take me wrong... I think DT bus and QuickRing made sense for a lot
- of people because they want to leverage off existing installed base.
- Fixing an old inefficient solution is not really a crime. But, what's
- next when today's fixes run out of steam in the future?
-
- I think it hurts to witness we all adopt something new, e.g., PCI or VL,
- because we need more (bandwidth) but soon find out it-ain't-enough and
- "fix" it by adding another path. A case in point, PCI or VL bus peak
- BW, as they stand today, will not be able to handle heavy video BW.
- What's your guess on how you can achieve more BW without changing the
- physical interface [see previous paragraph for hints]?
-
- We looked at existing solutions including wide buses, point-to-point
- and fiber links. None of the existing solutions met our criteria. So,
- we started with a clean sheet of paper.
-
- We want to start off with something sufficient for today's needs at
- minimum cost and don't want to add significant cost in the future when
- we need more. We also want to minimize multiple levels of protocol
- changes like today's solutions - having buses for CPU, local (PCI),
- standard low-speed I/O (ISA), propriatary highspeed I/O (whatever),
- standard medium speed I/O (SCSI), etc. On the other hand, we also
- want to offer for those who insist on having a "migration path". We
- want to offer and have options to optimize the I/O subsystem for
- different criteria, such as, cost, performance, form factor,
- expandability, compatibility, etc.
-
- Based on what I know on QuickRing(QR)...
- QR controller needs at least 78 signals (6 each for Up/Down and 33
- each for Receive/Transmit ports). The polyimide flex cable media
- has lower dielectric constant than FR4 PCB, allowing the clock
- rate at 200 MHz with sub-nanosecond edge rates.
-
- My questions are
- - How much does a node cost including the controller, an impedance-
- controlled connector and the polyimide flex cable?
- - How many QR devices can I attach?
- - What is the QR board form factor?
- - How do I add an option card with a QR attachment? Disconnect the
- ring, plug in the add-in card and connect the ring back with an
- additional ring segment? How do I achieve hot-plug? How do I
- take care of the card spacings and cable lengths so that they won't
- look too ugly outside the box? Or do I need to take off that box
- cover?
- - How can I swap a QR device between an Apple and a Company-X?
-
- We think we found a way to achieve A, B, C and D (see 1st paragraph)...
-
- Is it dangerous to go with other solutions when there is a solution
- that offers similar or higher performance and a good expansion story
- at lower cost?
-
- Hope this helps,
- Kevin
-
- [What's the next best thing when you can't give your customer
- the highest performance and unlimited expansion system for free?]
-
-