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- Newsgroups: comp.sys.sgi
- Path: sparky!uunet!stanford.edu!CSD-NewsHost.Stanford.EDU!news
- From: philip@ziggy.stanford.edu (Philip Machanick)
- Subject: TLB miss cost?
- Message-ID: <1992Jul27.182339.5075@CSD-NewsHost.Stanford.EDU>
- Sender: news@CSD-NewsHost.Stanford.EDU
- Reply-To: philip@ziggy.stanford.edu (Philip Machanick)
- Organization: CS Department, Stanford University, California, USA
- Date: Mon, 27 Jul 1992 18:23:39 GMT
- Lines: 11
-
- I'm working on a large-scale application in which data structures are hit a
- relatively small number of times in a loop. I've observed changes in
- performance according to placement in memory that suggest that the TLB miss
- cost on a 4D/380 is about 50-60 cycles.
-
- Does anyone have information on this to confirm or correct my figures?
-
- Thanks.
- --
- Philip Machanick
- philip@pescadero.stanford.edu
-