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- Path: sparky!uunet!olivea!sgigate!odin!fido!zola!twilight!zuni!europa!steve
- From: steve@europa.esd.sgi.com (Loopy - the spineless boy)
- Newsgroups: comp.sys.sgi
- Subject: Re: Memory upgrades for R4000 Indigos
- Message-ID: <nj2m9s0@zuni.esd.sgi.com>
- Date: 21 Jul 92 17:53:23 GMT
- References: <1992Jul17.204254.6599@microunity.com> <1992Jul21.004035.27345@donau.et.tudelft.nl> <1992Jul21.064111.1619@microunity.com>
- Sender: news@zuni.esd.sgi.com (Net News)
- Organization: Silicon Graphics, Inc. Mountain View, CA
- Lines: 53
-
- In <1992Jul21.064111.1619@microunity.com> jsw@microunity.com (Jeff Weinstein) writes:
-
- >In article <1992Jul21.004035.27345@donau.et.tudelft.nl>, reinoud@dutecai.et.tudelft.nl (R. Lamberts) writes:
- >> From article <1992Jul17.204254.6599@microunity.com>, by jsw@microunity.com (Jeff Weinstein):
- >> >
- >> > The simms used in the R4k indigo are industry standard 36-bit wide
- >> > 80ns simms. The prices quoted me by SGI are $1500 for 16Meg and $3000
- >> > for 32Meg. You should be able to get about half that price from
- >> > the usual workstation memory vendors.
- >> >
- >> > --Jeff
- >>
- >> Very interesting... Considering the expensive special SIMMs in an
- >> R3k Indigo, does this mean that:
- >>
- >> - main memory on a R4k Indigo is slower than on a R3k Indigo, or
- >>
- >> - the special SIMMs in the R3k Indigo are just to shake some more
- >> money out of us?
-
- > Actually neither is true. The main problem with the r3k indigo was that
- >there just wasn't room on the CPU board to put the chips that did the
- >memory interleaving/control, so they had to go on the back of the simms.
- >It was definitely not a conspiracy on the part of SGI marketing to squeeze
- >more money out of customers. The engineers sincerely felt bad to have
- >to make that sort of engineering trade-off, and vowed never to do it
- >again. They have lived up to it in the new r4k indigo.
-
- > --Jeff
-
- Well put, Jeff, and accurate, too!. Room was found on the R4K board by offloading
- the R4K and 2nd level cache on a daughter board. I'll let the reader draw
- his/her own conclusions about removeable CPU modules.
-
- Putting the CPU and cache on a module was considered for the R3K design, but was
- rejected due to cost and complexity. It cost more to make a separate PC board,
- and all the logistics that go with it. Where do you divide the CPU subsystem?
- If you put the R3K and cache on one board, then you would have to drag the
- high speed CPU bus down the connector to the read/write buffer (5 glue chips
- and a gate array). This bus was marginal to begin with. Putting the read/write
- buffer on the module makes the module too big to fit, and also compromises the
- main memory and GIO bus timing. The R4000 CPU interface is much cleaner and
- easier to deal with, so it can be (carefully) placed on a module.
-
- It was definitely *NOT* our intent to ream the customer with custom SIMMS. Even
- SGI's lowest cost machine designs refuse to make big sacrifices on performance
- in order to cut the cost a little. No one here likes to design mediocre machines!
- I'll take off my rose-colored corporate patriotism glasses now and get back to
- work...
-
- --
- Steve Valin Silicon Graphics - Interactive Systems Division
- 4153901379 "Same shit, different name"
-