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- Path: sparky!uunet!caen!hellgate.utah.edu!cc.usu.edu!ivie
- From: ivie@cc.usu.edu (CP/M lives!)
- Newsgroups: comp.sys.dec
- Subject: Re: VAX question
- Message-ID: <1992Jul27.104443.57514@cc.usu.edu>
- Date: 27 Jul 92 10:44:42 MDT
- References: <1992Jul26.015003.1@matrix.cs.wright.edu> <1992Jul27.134542.4845@ryn.mro4.dec.com>
- Organization: Utah State University
- Lines: 22
-
- In article <1992Jul27.134542.4845@ryn.mro4.dec.com>, bhandarkar@wrksys.enet.dec.com (Dileep Bhandarkar) writes:
- > The P0 space begins at virtual address 0 and grows in the direction of larger
- > addresses. P1 starts at virtual address 2**31-1 and grows in the direction of
- > smaller addresses. Since the P1 region grows towards smaller addresses, the
- > base and length registers describe the part of P1 space that is not accessible.
-
- I think that the reason for this is so that you can put the user stack
- way the heck up there in the address space without having to have a page
- table large enough to map the entire virtual space for each process. If you
- put the stack at the top of P0 space, for instance, the page table for the
- process would have to have enough entries to map all of P0 space. Since most
- of P0 space is unused, it doesn't make sense to require the page table to
- include all of it.
-
- Separating the stack into P1 space and making P1 space grow down lets the
- machine keep the stack in a separate page table.
-
- RISC processors sidestep the issue by pushing page table lookup into
- softwareland.
-
- Roger Ivie
- ivie@cc.usu.edu
-