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- Path: sparky!uunet!mcsun!Germany.EU.net!unido!infko!inews
- From: hodgen@infko.uni-koblenz.de
- Newsgroups: comp.misc
- Subject: Re: Building your own PC
- Message-ID: <1992Jul30.071820.28653@infko.uucp>
- Date: 30 Jul 92 07:18:20 GMT
- Sender: Wayne Hodgen
- Followup-To: comp.misc
- Organization: Uni Koblenz, Germany.
- Lines: 112
-
- In article <55421@mentor.cc.purdue.edu> gfritz@sage.cc.purdue.edu ("Happy Fun Ball") writes:
-
- >Hello, netters. I`m interested in building my own computer from scratch, but
- >I don`t know where to begin. So, you may ask, why would I want to even try?
- >[Deleted]
- >My question: Are there any text files out there (especially obtained by FTP)
- >that explain how to do this? Could anyone reccomend any good published books
- >for the novice?
- >
-
- This came up in comp.arch a while back and I saved the references 'cos I'd
- really like to build my own too. I just don't have the time - *sigh*.
-
-
- ----- Begin included file -----
-
- Original question by pclink@cheops.qld.tne.oz.au (Rick) writes:
-
- This may seem like a crazy thing to do, but...
-
- I'm considering building a computer system from scratch, as in the
- days of the mid '70s. Getting started from picking a cpu/architecture
- to building up a system with a wire-wrap gun, creating own monitor, and
- adding i/o subsystems on the fly...
-
- Why, you might ask? call it a whim, or just wanting to get 'back to
- basics'...and prove to myself that it can be done..
-
- Anyway, what I'd like to know is what would be a good RISC processor
- to use for this project. Something in the Rxxx series? Maybe a
- SPARC chip set?
-
- -bob
-
- p.s. at least, this would bring both hardware and software
- implementation into play...
-
- ------
-
- Sounds fun. Check out Prosser & Winkel's _The Art of Digital Design_. They
- have undergraduates build PDP-8's.
-
- -------------------------------------------------------
- Rob Steele rob@ll.mit.edu
- MIT Lincoln Laboratory
- 244 Wood St., C-153 What is man that thou
- Lexington, MA 02173 art mindful of him?
- 617/981-2575
-
- ------
-
- I second the notion of building your own CPU, assuming you have the time and
- inclination. A good model to use would be the DLX architecture defined in
- Hennesey & Patterson's Computer Architecture book. It's a good generic 32-bit
- RISC CPU, with several implementations broadly described in the book. You can
- get a gcc compiler with DLX backend, DLX simulator and other stuff thru the
- book's publisher. By the way, anyone reading comp.arch is foolish not to own
- this book.
-
- Use TTL, or PALs, or ideally FPGAs, if you have access to the FPGA design
- software. I also second the advice on lots of decoupling caps, good grounds,
- ground planes, and twisted pair or coax clock distribution. Be sure to put in
- lots of blinky lights, and run/stop/single-step switches like minis used to
- have.
-
- Since you will now have complete control over your CPU and memory design, you
- can move on to build several of them and implement your very own allcache memory
- system like KSR's! Shouldn't take more than one or two weekends ;-)
-
- I can't think of a bigger or more educational time sink!
-
- --Mike
- --
- Mike Butts, Research Engineer 503-685-1302(fax:7985)
- mbutts@cs.mentorg.com KC7IT ...!uunet!mntgfx!mbutts
- Mentor Graphics Corporation, 8005 SW Boeckman Road, Wilsonville, Oregon 97070
- Any opinions are my own, and aren't necessarily shared by Mentor Graphics Corp.
-
- ------
-
- I suggest you post your request to sci.electronics - that's where hardware
- hacks hang out. I can't think of a good book, besides Don Lancaster's
- TTL Handbook, which is somewhat dated but has good advice. As a general
- rule you probably want to use wire-wrap, with a ground plane and ideally
- a power plane as well, with short and thick power connections to the power
- pins. Put a 0.1 microfarad ceramic capacitor between power and ground near each
- chip, or maybe one for every set of power pins on the big chips. Put a 25 or
- more microfarad tantalum cap on the board for every 25 chips or so. Use twisted
- pair (one wire grounded at both ends) for clock signals and maybe any other
- edge-sensitive signals. Beautiful neat bundles of parallel wires are actually
- asking for crosstalk, so just wire point to point. Be sure you debug with a
- fast enough scope to see little fast and narrow spikes. Design as much as you
- can with a single clock, and no latches, asynchronous loops or analog delays.
- Do these things and you're fine up to 10 MHz or so anyway, maybe faster.
-
- Enjoy!
-
- --Mike
- --
- Mike Butts, Research Engineer 503-685-1302(fax:7985)
- mbutts@cs.mentorg.com KC7IT ...!uunet!mntgfx!mbutts
- Mentor Graphics Corporation, 8005 SW Boeckman Road, Wilsonville, Oregon 97070
- Any opinions are my own, and aren't necessarily shared by Mentor Graphics Corp.
-
- ----- End included file
-
- I hope this helps. If you get any other references, please post or mail me.
- --
- Wayne Hodgen | hodgen@infko.uni-koblenz.de | Opinions (c) Me 1991 | Intel SX
- Uni Koblenz, | (..!unido!infko!hodgen) | Keeper of the Scrolls, | Just
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-