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1988-02-04
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10KB
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183 lines
84KP256A.LBR - the new (2/88) update to the original 9/86 library. This
version is stand-alone, all you need is M80 and L80. The mod costs about
40 dollars and takes about three hours. It's well worth it.
* * * * *
The following is an update to Dr. Liddle's '83 Kaypro 256K RAMDRIVE
modification, which allows the fine mod to be made to the '84 machines.
Unfortunately, the mod will NOT work on the 10/83 series machines (those
with graphics, but without PIO chips,) but will work on any other Kaypro
system with graphics, and with Handyman too. I have done a 10/83, and
will make that mod public, although it is very involved. Those with
'83 non-graphics machines (you know - the FAST ones!) should use Dr.
Liddle's original KP256RAM library for conversion, available on GEnie.
Configure RAMDRIVE.MAC for your machine. I use the Advent Turbo-Rom, and
operate on a 61.75K system. My address for DIRBUF is 0FEE5H. I set RAMDRIVE
to load at 0F363H, which is above my ZCPRII stack and EXTFCB. Set the PIO
DATA and CONTROL equates to the appropriate port - see the PIO mods below to
determine port addresses. Compile using M80 and link with L80. Correct
syntax for my L80 is shown in RAMDRIVE.MAC. For those without Turbo-Rom,
use PROB12 and PATCH18A to find those large chunks of unused memory above
CP/M and below the disk buffers. You need two "pages" of memory.
If your RAM is unsocketed, remove the 64K chips (U32, U33, U38, U39, U41, U42,
U47, U48). carefully - either by cutting the leads at the body and removing
them one by one, or by careful desoldering of all leads. Install sockets, and
wire all pin #1's together on RAM sockets. Re-install the 64K chips (or use
the 256K chips and tie the common pin #1 to +5v.) Test the machine thoroughly
with the enclosed MT256.COM - which will crash if your CP/M is bigger than
62.75K - but it tests each location up to the point of crash for every possible
read/write value. An error will appear if any cell is bad.
Build the overlay in Figure 1 below. Mount the overlay behind the Monitor ROM,
so that all wires are as short as possible. Don't forget to bend out pin 24
from U-29 so that it doesn't go into the socket!
If your machine is a 4/84 OR 10/84 WITH internal modem or real time clock,
skip to the piggyback mod. If no RTC or modem, then install a PIO in position
U-35 and tie PIO-1,2,3 from the overlay below to 27,28,29 on U-35. If U-27
is missing, install it also. If your machine was previously modified to enable
interrupts (a jumper to the right of the PIO,) remove that jumper. Your ports
for RAMDISK.MAC are 021H and 023H for data and control, respectively. Set
these equates near the end of RAMDRIVE.MAC.
FOR 4/84's and 10/84's WITH internal modem and/or RTC, add another PIO now.
Piggy-back a new Z80-PIO chip carefully on top of the old one as follows:
Solder Pins 1-3, 5-6, 11, 19-20, 22-26, 34-40 to the existing
PIO chip (carefully!).
Attach NEW PIO pin 4 to U-27 pin 13. This designates the NEW PIO
as Ports 029H and 02BH for data and control.
Tie PIO 1,2,3 from the overlay to 27, 28, 29 of NEW PIO. You also
end up with a spare side for another parallel port if you like.
Now install new 256K chips in the RAM sockets or remove common pin #1 from
the +5v bus. Wire the overlay, (table 1) keeping all wires, ESPECIALLY 16 MHZ
as short as possible, and keep them separated if possible.
Turn on your machine. It should boot and perform properly. Check memory
again with MT256, and check ALL hardware - if ANYTHING appears abnormal,
fix it first! Run RAMDRIVE and you should be able to log into the RAMDRIVE
(C or D as selected in RAMDRIVE.MAC) Test thoroughly by NSWPing many files
to RAMdrive, or by running BD.COM (FINDBAD won't work here.)
The theory is simple: We need the MUX and RFSH signals that the '84's
lack. U6 buffers the 16 mhz clock signal, and inverts 1/RFSH from the
Z80. U5 generates a pulse from 1/MREQ and RFSH that allows U4 to
generate the missing MUX signal. The rest of the circuit is a duplicate
of Dr. Liddle's KP256RAM circuit.
2/88 - I have re-written these docs to reflect the slight improvements made
since the 9/86 writing. Mainly, RAMBUF must be internal to RAMDRIVE, or in
an unused area (Perfect Writer couldn't handle the buffer sharing) and the
74XXX04 can be anything fast and hi-z (HCU, HCT, probably F.) I am waiting
for the 1 Meg chips to hit $10 before trying to expand the RAMdisk.
This mod has been made on about 15 machines, including those operating three
of the four ports on Jacksonville's Multi-Buss Network. These machines have
been running without problem for 18 months now, and have logged over 130,000
callers.
I'd appreciate any comments/suggestions be left to me on GEnie (CWMCHAN)
or call AMY'S CRYSTAL PALACE I at 904-725-5435 (300/1200/2400) or AMY'S
CRYSTAL PALACE II at 904-725-6122 (300/1200).
\_TABLE I\_
Signal on Chip on
Board Kaypro '84
1/RFSH U43 pin 28
1/MREQ U43 pin 19
A7 U43 pin 37
A15 U43 pin 5
RA7 U32 pin 9
RA8 U32 pin 1
PIO 1 NEW PIO Pin 27
PIO 2 NEW PIO Pin 28
PIO 3 NEW PIO Pin 29
16 MHZ Jnct of C84/R40/Y5/U29-39
Also, lift Pin 24 of U-29 to disable the existing A7/15 line to the
RAM chips.
\_FIGURE 1\_
+-----------------------------+
| U1 |
| +--------+ |
| +------| 7 |- 0v |
| | -| 4 |----------+
| | -| L |-
| | -| S |-
| | 0v -| 3 |-
+--|------| 9 |- 0v
| +5v -| 3 1|----------+
| +--------+ |
| |
| U2 |
33R | +--------+ |
RA7 <-- / /---|------| |- 0v |
+------| 7 |- |
+---------| 4 |- |
| -| L |- |
| -| S |- |
| -| 1 |- |
| 0v -| 5 |- 0v | (RFSH)
| +5v -| 8 1|----------o--------------------------+
| +--------+ |
| |
| U3 |
| +--------+ |
+---------| |- 0v 33R |
A7 >------------o--| 7 |------------ / /--------> RA8 |
\_| 4 |-----------------o------< PIO 2 |
PIO 1 >---------------| L |-< +5v >-/\/\/\_/ 4.7k |
0v -| S |-----------------o------< PIO 3 |
A15 >---------------| 1 |-< +5v >-/\/\/\_/ 4.7k |
0v -| 5 |------------------------+ |
+5v -| 3 1|- 0v | |
+--------+ | (MUX) |
| |
U4 | |
+--------+ | |
-| 7 |- 0v | |
-| 4 |- | |
+5v -| L |------------------------+ |
-| S |- +5v |
+5v -| 7 |-----------------------------+ |
-| 4 |- +5v | |
+5v -| 1|------------------------+ | |
+--------+ | | |
| | |
U5 | | |
+--------+ | | |
0v -| 7 |- 0v | | |
0v -| 4 |- 0v | | |
-| L |- 0v | | |
0v -| S |- | | |
0v -| 0 |-------------------+ | | |
-| 2 |------> 1/MREQ | | | |
+5v -| 1|------------------------+ | |
+--------+ | | |
0v <--| |--> +5v | | |
U6 | | |
0.1 mfd +--------+ | | |
50 v. -| 7 |- 0v | | |
0v -| 4 |-----------------------------+ |
-| H |------> 16MHz | |
0v -| C |- | |
-| T or U |- 0v | |
0v -| 0 |-------------------o-----------------+
+5v -| 4 1|------> 1/RFSH
+--------+
