The World of Computer Software/World_Of_Computer_Software-02-385-Vol-1of3.iso/h/hpaper.zip/HPAPER.TXT

Text File | 1993-01-03 | 12KB | 202 lines

***Downloaded directly from the Hayes Support BBS on 01-03-93


High Speed Serial Communications Solutions



HISTORY
When the IBM Personal Computer was introduced in 1981, the vast majority of
dial-up modems in use operated at 300 bits per second (bit/s) using Bell 103
modulation.  The fastest asynchronous data terminals directly connected to
computers were limited to 9600 bit/s.  At that time, it would have been nearly
impossible to predict the rapid advances in digital signal processing
techniques that would permit much higher data rates.  It is not surprising,
therefore, that the designers of the PC chose asynchronous serial port
technology (the 8250 UART) and assigned interrupt priority for serial
communications that were appropriate for 9600 bit/s and below.

There have been astounding advances in modem technology for PCs since that
time.
%       2400 bit/s modems (CCITT Recommendation V.22 bis) in 1984
%       proprietary 9600 bit/s modems around 1987
%       V.32 modems in 1989 (although this standard had been adopted in 1984,
the technology became affordable for the PC market 5 years later)
%       CCITT V.42 bis data compression in 1990
%       14,400 bit/s full-duplex transmission with CCITT V.32 bis in 1991

Today, the modem of choice includes both V.32 bis modulation and V.42 bis data
compression and is capable of throughput as high as 57,600 bit/s -- nearly 200
times the speed of modems known by the designers of the IBM PC.  And it doesn't
stop there: CCITT experts are pushing forward to develop the next generation of
dial-up modems.  This will likely be the "last" major modem advance before the
widespread availability of ISDN and will provide data rates up to 28,800 bit/s
or 115,200 bit/s with compression.

THE PROBLEMS
Even at these data rates, the 8250 UART can function well, if it receives
undivided attention from the PC's software.  Some programs accomplish this by
taking over the whole PC and "polling" the UART rather than using
interrupt-driven I/O.  However, few users are willing to live with such
limitations.  Most users install a variety of terminate-and-stay-resident (TSR)
software packages and device drivers to provide convenient and necessary tools.
 Some of these operate by capturing interrupts from such devices as the system
clock and the keyboard, which are of higher priority than serial
communications.  When those interrupts processing times are extended, the
results are missed serial port interrupts and lost data.  LAN card drivers and
RAM disks can cause similar problems.  Attempting to support simultaneous
communications on multiple serial ports, such as on a bulletin board system,
presents even greater challenges, particularly when combined with high LAN
activity such as on a LAN serial communications server.

These data loss problems are further compounded by today's LAN/network
environments and the multitasking environments such as Microsoft Windows, OS/2,
and Unix. These systems provide the optimum in convenience, flexibility, and
performance, but, by design, make it almost impossible for a communicating
application to maintain the complete control over the PC central processing
unit necessary to avoid data loss at high rates.

Another problem introduced by multitasking environments is the complex
"context switching" process necessary whenever an interrupt is processed.  In a
single-tasking system, the process of handling an interrupt is fairly simple.
In a multitasking system, it is necessary to save much more information about
the current operating process (the "context"), and to undertake the operations
necessary to activate the process to handle the new data. Typically, serial
communication generates a separate interrupt for each character received.  At
today's high data rates, this can flood the multitasking kernel, using up
virtually all of the processing time available in even the most powerful
computers.

Some of these problems can be improved by using lower data rates, but users
simply will not be satisfied with less-than-optimal performance from their
high-powered computers and modems.  Specifically, they will not accept that
their "error-control" modems, which eliminate data corruption on the phone
line, deliver data to the PC so fast that data is lost in the UART!  Obviously,
another solution is necessary.

SOLUTIONS?
Clearly, the IBM PC designers would have needed profound vision and wisdom to
have included in the PC the capability to handle such requirements.
Interestingly, they did -- although not directly.

The standard 8250 UART can't adequately deal with the problems described
above.  It has only a one-byte receive data buffer.  So if processing of the
incoming characters is delayed by more than the time it takes to receive the
next character (which is only 260 microseconds [millionths of a second] at
38,400 bit/s, and only 65 microseconds at 115,200 bit/s), the preceding
character in the UART buffer is overwritten by the new character -- data is
lost.

The 16450 UART, which is commonly used in today's PCs and compatibles,
supports faster speeds on the PC's internal bus, but still has only a one-byte
buffer and the same tight constraints on timing as the 8250.

The 16550A UART is a step in the right direction.  It is compatible with the
8250 and 16450, and, for applications which support it, provides a 16-byte
receive data "FIFO" (first-in first-out buffer).  This permits the
communicating application to be delayed a bit more in the processing of
incoming data without suffering data loss.  However, once the 16-byte FIFO is
filled, new data will still be lost; the 16550A cannot automatically assert
flow control to the modem to prevent new data from being delivered.  The 16550A
also helps the context-switching problem somewhat by allowing the application
to defer interrupts until some number of bytes have been received (e.g., 8 or
14); each byte must still, however, be individually read and moved into a
memory buffer by the CPU.

The designers of the IBM PC showed their foresight in the basic paradigm of
the PC -- a minimum of necessary components on the "motherboard" (main system
board), with most peripherals placed on add-on cards.  The PC and its progeny
are thus not locked into the limitations of the technology that existed in
1981, or even the technology most commonly used today; it is a relatively
simple matter, should a new problem arise, to create an appropriate add-on card
to address the issues and allow users to move forward with greater efficiency
and higher performance.

THE REAL SOLUTION
Hayes ESP Communications Accelerator is an add-on solution.  ESP
Communications Accelerator is a two-port full-size card for ISA/EISA and
Microchannel systems.  For backward compatibility with existing applications,
ESP uses 16550A UARTs, and works with all current communications software
(unlike some alternative systems which require extensive reprogramming).  Most
importantly, ESP provides a dedicated communications coprocessor which, when
operating in DMA Enhanced mode, not only eliminates the problems of data loss
due to UART FIFO overrun, but dramatically reduces the number of interrupts
which must be processed.  This considerably boosts the performance of
applications running on the main CPU.

ESP Communications Accelerator provides three operating modes.  In
"Compatibility Mode," the 16550A UARTs are completely available to the
communications software; ESP Communications Accelerator operates like any other
"dumb" serial card.

In "FIFO Enhanced Mode," ESP Communications Accelerator provides the 16550A
16-byte FIFOs for all software (even older software which is not 16550A-aware
and does not know to enable the FIFOs) and hardware (RTS or DTR) flow control
of incoming data.  This hardware flow control is fully coordinated with the
flow control asserted by the communicating application, and eliminates data
loss due to UART FIFO overruns.

In "DMA Enhanced Mode," the full power of ESP's dedicated communications
accelerator is applied.  Rather than the small 16-byte FIFOs in the 16550As,
ESP provides full 1024-byte FIFOs for both transmitted and received data.
Fully automatic bi-directional flow control is provided, which can be either
hardware (RTS/CTS or DTR/DSR) or character-based (XON/XOFF or Hayes Transparent
XON/XOFF).  And, direct-memory-access (DMA) transfers of data between ESP and
main system memory (for both transmission and reception) dramatically reduce
the amount of processing overhead required to support high-speed serial
communications -- by as much as 98% -- leaving most of the CPU resources for
doing "real work."

Operation in DMA Enhanced Mode does require cooperation between ESP and the
communications software; it is a decidedly different method from the
traditional character-at-a-time paradigm of the original PC UART chips.  To
simplify this, Hayes has placed the Enhanced Serial Interface (ESI) into the
public domain.  ESI specifies the interface to ESP and compatible devices.
Customers can easily identify MS-DOS communications software which is
compatible with ESP by looking for the "ESI" logo on the package.

HAYES ESP COMMUNICATIONS ACCELERATOR FOR WINDOWS
Hayes provides serial communications drivers which fully support ESI and ESP's
DMA Enhanced Mode for Windows 3.0 and 3.1.  With these drivers installed, all
applications (including DOS applications running under this environment) gain
the full advantage of DMA transfers and automatic flow control with no special
programming required; the serial drivers provide the same API (application
programming interface) as the standard Microsoft and IBM serial drivers, with
the details of the ESP DMA operation hidden inside.

Whereas the standard Windows serial driver can suffer data loss at speeds as
low as 9,600 bit/s, with Hayes ESP and the ESP driver for Windows, full-duplex
communications as fast as 57,600 bit/s can be accomplished with complete data
integrity flow and greatly increased availability of CPU processing power to
other applications.  The implementation of block mode transfers in the Windows
3.1 kernel and the use of this mode by Hayes ESP Driver for Windows 3.1
considerably improves performance of the driver over earlier versions and over
the standard Windows serial driver.  The Hayes driver supports both ESP ports
and standard serial ports, for systems which support a combination of both.

NETWARE SOLUTION
Hayes also provides Hayes ESP Driver for Novell NetWare.  This driver allows
NetWare Loadable Modules (NLMs), such as Novell's Asynchronous Communications
Services (NACS) V3.0, to take full advantage of Hayes ESP.  The combination of
Hayes ESP, NACS V3.0 and high-speed modems, such as Hayes OPTIMA 144 or ULTRA
144, adds low-cost, high-speed communications server capability to a NetWare
V3.11 file server. This solution allows NASI-aware communications software,
such as Hayes Smartcom Exec and Smartcom for Windows, to take advantage of
shared modems on a communications server.  ESP is also capable of delivering
this functionality in other Netware environments such as Remote Access and
Internetwork Mail.  Without ESP and Hayes ESP Driver for NetWare, data can be
lost at speeds as low as 4,800 bit/s; with ESP, full-duplex performance as high
as 57,600 bit/s is achieved.

CONCLUSION
Today's demanding personal computer users need not be satisfied with poor
communications performance because of data loss or interrupt load.  Hayes ESP
Communications Accelerator, and the appropriate ESP driver for the operating
environment being used, can eliminate data loss and dramatically reduce the
number of interrupts to be processed. Users can thus take full advantage of the
latest advances in communications technology, and advances yet to come, to
improve their efficiency and productivity -- which goes right to the bottom
line.