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ASxxxx Assemblers
and
ASLINK Relocating Linker
CHAPTER 1 THE ASSEMBLER 1-1
1.1 THE ASXXXX ASSEMBLERS 1-1
1.1.1 Assembly Pass 1 1-2
1.1.2 Assembly Pass 2 1-2
1.1.3 Assembly Pass 3 1-2
1.2 SOURCE PROGRAM FORMAT 1-3
1.2.1 Statement Format 1-3
1.2.1.1 Label Field 1-3
1.2.1.2 Operator Field 1-5
1.2.1.3 Operand Field 1-5
1.2.1.4 Comment Field 1-6
1.3 SYMBOLS AND EXPRESSIONS 1-6
1.3.1 Character Set 1-6
1.3.2 User-Defined Symbols 1-10
1.3.3 Local Symbols 1-11
1.3.4 Current Location Counter 1-12
1.3.5 Numbers 1-14
1.3.6 Terms 1-14
1.3.7 Expressions 1-15
1.4 GENERAL ASSEMBLER DIRECTIVES 1-16
1.4.1 .module Directive 1-16
1.4.2 .title Directive 1-17
1.4.3 .sbttl Directive 1-17
1.4.4 .page Directive 1-17
1.4.5 .byte and .db Directives 1-17
1.4.6 .word and .dw Directives 1-18
1.4.7 .blkb, .blkw, and .ds Directives 1-18
1.4.8 .ascii Directive 1-18
1.4.9 .asciz Directive 1-19
1.4.10 .radix Directive 1-19
1.4.11 .even Directive 1-20
1.4.12 .odd Directive 1-20
1.4.13 .area Directive 1-20
1.4.14 .org Directive 1-22
1.4.15 .globl Directive 1-22
1.4.16 .if, .else, and .endif Directives 1-23
1.4.17 .include Directive 1-24
1.4.18 .setdp Directive 1-24
1.5 INVOKING ASXXXX 1-26
1.6 ERRORS 1-27
1.7 LISTING FILE 1-28
1.8 SYMBOL TABLE FILE 1-30
1.9 OBJECT FILE 1-30
CHAPTER 2 THE LINKER 2-1
2.1 ASLINK RELOCATING LINKER 2-1
2.2 INVOKING ASLINK 2-2
2.3 ASLINK PROCESSING 2-3
2.4 LINKER INPUT FORMAT 2-4
2.4.1 Object Module Format 2-5
2.4.2 Header Line 2-5
2.4.3 Module Line 2-5
2.4.4 Symbol Line 2-5
2.4.5 Area Line 2-6
2.4.6 T Line 2-6
2.4.7 R Line 2-6
2.4.8 P Line 2-7
2.5 LINKER ERROR MESSAGES 2-7
Page ii
CHAPTER 3 BUILDING ASXXXX AND ASLINK 3-1
3.1 BUILDING AN ASSEMBLER 3-1
3.2 BUILDING ASLINK 3-2
APPENDIX A AS6800 ASSEMBLER A-1
A.1 6800 REGISTER SET A-1
A.2 6800 INSTRUCTION SET A-1
A.2.1 Inherent Instructions A-2
A.2.2 Branch Instructions A-2
A.2.3 Single Operand Instructions A-3
A.2.4 Double Operand Instructions A-4
A.2.5 Jump and Jump to Subroutine Instructions A-4
A.2.6 Long Register Instructions A-5
APPENDIX B AS6801 ASSEMBLER B-1
B.1 .hd6303 DIRECTIVE B-1
B.2 6801 REGISTER SET B-1
B.3 6801 INSTRUCTION SET B-1
B.3.1 Inherent Instructions B-2
B.3.2 Branch Instructions B-2
B.3.3 Single Operand Instructions B-3
B.3.4 Double Operand Instructions B-4
B.3.5 Jump and Jump to Subroutine Instructions B-5
B.3.6 Long Register Instructions B-5
B.3.7 6303 Specific Instructions B-5
APPENDIX C AS6804 ASSEMBLER C-1
C.1 6804 REGISTER SET C-1
C.2 6804 INSTRUCTION SET C-1
C.2.1 Inherent Instructions C-2
C.2.2 Branch Instructions C-2
C.2.3 Single Operand Instructions C-2
C.2.4 Jump and Jump to Subroutine Instructions C-2
C.2.5 Bit Test Instructions C-2
C.2.6 Load Immediate data Instruction C-3
C.2.7 6804 Derived Instructions C-3
APPENDIX D AS6805 ASSEMBLER D-1
D.1 6805 REGISTER SET D-1
D.2 6805 INSTRUCTION SET D-1
D.2.1 Control Instructions D-2
D.2.2 Bit Manipulation Instructions D-2
D.2.3 Branch Instructions D-2
D.2.4 Read-Modify-Write Instructions D-3
D.2.5 Register\Memory Instructions D-3
D.2.6 Jump and Jump to Subroutine Instructions D-4
APPENDIX E AS6809 ASSEMBLER E-1
E.1 6809 REGISTER SET E-1
E.2 6809 INSTRUCTION SET E-1
E.2.1 Inherent Instructions E-3
E.2.2 Short Branch Instructions E-3
E.2.3 Long Branch Instructions E-3
E.2.4 Single Operand Instructions E-4
Page iii
E.2.5 Double Operand Instructions E-5
E.2.6 D-register Instructions E-5
E.2.7 Index/Stack Register Instructions E-5
E.2.8 Jump and Jump to Subroutine Instructions E-6
E.2.9 Register - Register Instructions E-6
E.2.10 Condition Code Register Instructions E-6
E.2.11 6800 Compatibility Instructions E-6
APPENDIX F AS6811 ASSEMBLER F-1
F.1 6811 REGISTER SET F-1
F.2 6811 INSTRUCTION SET F-1
F.2.1 Inherent Instructions F-2
F.2.2 Branch Instructions F-2
F.2.3 Single Operand Instructions F-3
F.2.4 Double Operand Instructions F-4
F.2.5 Bit Manupulation Instructions F-4
F.2.6 Jump and Jump to Subroutine Instructions F-5
F.2.7 Long Register Instructions F-5
APPENDIX G AS6816 ASSEMBLER G-1
G.1 6816 REGISTER SET G-1
G.2 6816 INSTRUCTION SET G-1
G.2.1 Inherent Instructions G-2
G.2.2 Push/Pull Multiple Register Instructions G-3
G.2.3 Short Branch Instructions G-3
G.2.4 Long Branch Instructions G-3
G.2.5 Bit Manipulation Instructions G-3
G.2.6 Single Operand Instructions G-4
G.2.7 Double Operand Instructions G-5
G.2.8 Index/Stack Register Instructions G-5
G.2.9 Jump and Jump to Subroutine Instructions G-6
G.2.10 Condition Code Register Instructions G-6
G.2.11 Multiply and Accumulate Instructions G-6
APPENDIX H AS8085 ASSEMBLER H-1
H.1 8085 REGISTER SET H-1
H.2 8085 INSTRUCTION SET H-1
H.2.1 Inherent Instructions H-2
H.2.2 Register/Memory/Immediate Instructions H-2
H.2.3 Call and Return Instructions H-2
H.2.4 Jump Instructions H-2
H.2.5 Input/Output/Reset Instructions H-3
H.2.6 Move Instructions H-3
H.2.7 Other Instructions H-3
APPENDIX I ASZ80 ASSEMBLER I-1
I.1 .hd64 DIRECTIVE I-1
I.2 Z80 REGISTER SET AND CONDITIONS I-1
I.3 Z80 INSTRUCTION SET I-2
I.3.1 Inherent Instructions I-3
I.3.2 Implicit Operand Instructions I-3
I.3.3 Load Instruction I-4
I.3.4 Call/Return Instructions I-4
I.3.5 Jump and Jump to Subroutine Instructions I-4
Page iv
I.3.6 Bit Manipulation Instructions I-5
I.3.7 Interrupt Mode and Reset Instructions I-5
I.3.8 Input and Output Instructions I-5
I.3.9 Register Pair Instructions I-5
I.3.10 HD64180 Specific Instructions I-6
Page v
P R E F A C E
The ASxxxx assemblers were written following the style of
several cross assemblers found in the Digital Equipment Corpora-
tion Users Society (DECUS) distribution of the C programming
language. The DECUS code was provided with no documentation as
to the input syntax or the output format. Study of the code
revealed that the unknown author of the code had attempted to
formulate an assembler with attributes similiar to those of the
PDP-11 MACRO assembler (without macro's). The incomplete code
from the DECUS C distribution has been largely rewritten, only
the program structure, and C source file organization remains
relatively unchanged. However, I wish to thank the author for
his contribution to this set of assemblers.
The ASLINK program was written as a companion to the ASxxxx
assemblers, its design and implementation was not derived from
any other work.
The ASxxxx assemblers and the ASLINK relocating linker are
placed in the Public Domain. Publication or distribution of
these programs for non-commercial use is hereby granted with the
stipulation that the copyright notice be included with all
copies.
I would greatly appreciate receiving the details of any
changes, additions, or errors pertaining to these programs and
will attempt to incorporate any fixes or generally useful
changes in a future update to these programs.
Alan R. Baldwin
Kent State University
Physics Department
Kent, Ohio 44242
C H A N G E S I N V 0 1 . 5 0
The ASxxxx assembler and linker have been updated to move
byte index, direct page mode, and byte pc relative address
checking from the assembler to the linker. This change has al-
lowed the following enhancements:
1. The .setdp directive now has a common format for all
AS68xx assemblers.
2. Direct page variables may be externally defined with
their addresses resolved at link time.
3. Byte index offsets may be external references and
resolved at link time.
4. Byte pc relative instructions (i.e. branches) may
reference external labels or labels in other areas.
The ASxxxx assemblers (using the -f or -ff option) can
generate a listing file which flags the data that will be relo-
cated by the linker.
The REL file format now has an additional directive for pag-
ing information and has additional flags for page0, page, and
unsigned byte formats. The new linker is compatible with the
first version of the ASxxxx assemblers.
The remaining changes are related to non-portable code found
while porting the assemblers to a motorola 68030 system.
CHAPTER 1
THE ASSEMBLER
1.1 THE ASXXXX ASSEMBLERS
The ASxxxx assemblers are a series of microprocessor assem-
blers written in the C programming language. Each assembler has
a device specific section which includes:
1. device description, byte order, and file extension in-
formation
2. a table of the assembler general directives, special
device directives, assembler mnemonics and associated
operation codes
3. machine specific code for processing the device mnemon-
ics, addressing modes, and special directives
The device specific information is detailed in the appendices.
The assemblers have a common device independent section which
handles the details of file input/output, symbol table genera-
tion, program/data areas, expression analysis, and assembler
directive processing.
The assemblers provide the following features:
1. Command string control of assembly functions
2. Alphabetized, formatted symbol table listing
3. Relocatable object modules
4. Global symbols for linking object modules
5. Conditional assembly directives
THE ASSEMBLER PAGE 1-2
THE ASXXXX ASSEMBLERS
6. Program sectioning directives
ASxxxx assembles one or more source files into a single relo-
catable ascii object file. The output of the ASxxxx assemblers
consists of an ascii relocatable object file(*.rel), an assembly
listing file(*.lst), and a symbol file(*.sym).
1.1.1 Assembly Pass 1
During pass 1, ASxxxx opens all source files and performs a
rudimenatry assembly of each source statement. During this pro-
cess all symbol tables are built, program sections defined, and
number of bytes for each assembled source line is estimated.
At the end of pass 1 all undefined symbols may be made global
(external) using the ASxxxx switch -g, otherwise undefined sym-
bols will be flagged as errors during succeeding passes.
1.1.2 Assembly Pass 2
During pass 2 the ASxxxx assembler resolves forward refer-
ences and determines the number of bytes for each assembled
line. The number of bytes used by a particular assembler in-
struction may depend upon the addressing mode, whether the in-
struction allows multiple forms based upon the relative distance
to the addressed location, or other factors. Pass 2 resolves
these cases and determines the address of all symbols.
1.1.3 Assembly Pass 3
Pass 3 by the assembler generates the listing file, the relo-
catable output file, and the symbol tables. Also during pass 3
the errors will be reported.
The relocatable object file is an ascii file containing sym-
bol references and definitions, program area definitions, and
the relocatable assembled code, the linker ASLINK will use this
information to generate an absolute load file (Motorola or Intel
formats).
THE ASSEMBLER PAGE 1-3
SOURCE PROGRAM FORMAT
1.2 SOURCE PROGRAM FORMAT
1.2.1 Statement Format
A source program is composed of assembly-language statements.
Each statement must be completed on one line. A line may con-
tain a maximum of 128 characters, longer lines are truncated and
lost.
An ASxxxx assembler statement may have as many as four
fields. These fields are identified by their order within the
statement and/or by separating characters between fields. The
general format of the ASxxxx statement is:
[label:] Operator Operand [;Comment(s)]
The label and comment fields are optional. The operator and
operand fields are interdependent. The operator field may be an
assembler directive or an assembly mnemonic. The operand field
may be optional or required as defined in the context of the
operator.
ASxxxx interprets and processes source statements one at a
time. Each statement causes a particular operation to be per-
formed.
1.2.1.1 Label Field -
A label is a user-defined symbol which is assigned the value
of the current location counter and entered into the user de-
fined symbol table. The current location counter is used by
ASxxxx to assign memory addresses to the source program state-
ments as they are encountered during the assembly process. Thus
a label is a means of symbolically referring to a specific
statement.
When a program section is absolute, the value of the current
location counter is absolute; its value references an absolute
memory address. Similarly, when a program section is relocat-
able, the value of the current location counter is relocatable.
A relocation bias calculated at link time is added to the ap-
parent value of the current location counter to establish its
effective absolute address at execution time. (The user can
also force the linker to relocate sections defined as absolute.
This may be required under special circumstances.)
If present, a label must be the first field in a source
statement and must be terminated by a colon (:). For example,
THE ASSEMBLER PAGE 1-4
SOURCE PROGRAM FORMAT
if the value of the current location counter is absolute
01F0(H), the statement:
abcd: nop
assigns the value 01F0(H) to the label abcd. If the location
counter value were relocatable, the final value of abcd would be
01F0(H)+K, where K represents the relocation bias of the program
section, as calculated by the linker at link time.
More than one label may appear within a single label field.
Each label so specified is assigned the same address value. For
example, if the value of the current location counter is
1FF0(H), the multiple labels in the following statement are each
assigned the value 1FF0(H):
abcd: aq: $abc: nop
Multiple labels may also appear on successive lines. For ex-
ample, the statements
abcd:
aq:
$abc: nop
likewise cause the same value to be assigned to all three la-
bels.
A double colon (::) defines the label as a global symbol.
For example, the statement
abcd:: nop
establishes the label abcd as a global symbol. The distinguish-
ing attribute of a global symbol is that it can be referenced
from within an object module other than the module in which the
symbol is defined. References to this label in other modules
are resolved when the modules are linked as a composite execut-
able image.
The legal characters for defining labels are:
A through Z
a through z
0 through 9
. (Period)
$ (Dollar sign)
_ (underscore)
A label may be any length, however, only the first eight (8)
characters are significant and, therefore must be unique among
all labels in the source program (not necessarily among
THE ASSEMBLER PAGE 1-5
SOURCE PROGRAM FORMAT
separately compiled modules). An error code(s) (m or p) will be
generated in the assembly listing if the first eight characters
in two or more labels are the same. The m code is caused by the
redeclaration of the symbol or its reference by another state-
ment. The p code is generated because the symbols location is
changing on each pass through the source file.
The label must not start with the characters 0-9, as this
designates a local symbol with special attributes described in a
later section.
1.2.1.2 Operator Field -
The operator field specifies the action to be performed. It
may consist of an instruction mnemonic (op code) or an assembler
directive.
When the operator is an instruction mnemonic, a machine in-
struction is generated and the assembler evaluates the addresses
of the operands which follow. When the operator is a directive
ASxxxx performs certain control actions or processing operations
during assembly of the source program.
Leading and trailing spaces or tabs in the operator field
have no significance; such characters serve only to separate
the operator field from the preceeding and following fields.
An operator is terminated by a space, tab or end of line.
1.2.1.3 Operand Field -
When the operator is an instruction mnemonic (op code), the
operand field contains program variables that are to be
evaluated/manipulated by the operator.
Operands may be expressions or symbols, depending on the
operator. Multiple expressions used in the operand fields may
be separated by a comma. An operand should be preceeded by an
operator field; if it is not, the statement will give an error
(q or o). All operands following instruction mnemonics are
treated as expressions.
The operand field is terminated by a semicolon when the field
is followed by a comment. For example, in the following
statement:
label: lda abcd,x ;Comment field
the tab between lda and abcd terminates the operator field and
defines the beginning of the operand field; a comma separates
THE ASSEMBLER PAGE 1-6
SOURCE PROGRAM FORMAT
the operands abcd and x; and a semicolon terminates the operand
field and defines the beginning of the comment field. When no
comment field follows, the operand field is terminated by the
end of the source line.
1.2.1.4 Comment Field -
The comment field begins with a semicolon and extends through
the end of the line. This field is optional and may contain any
7-bit ascii character except null.
Comments do not affect assembly processing or program execu-
tion.
1.3 SYMBOLS AND EXPRESSIONS
This section describes the generic components of the ASxxxx
assemblers: the character set, the conventions observed in con-
structing symbols, and the use of numbers, operators, and ex-
pressions.
1.3.1 Character Set
The following characters are legal in ASxxxx source programs:
1. The letters A through Z. Both upper- and lower-case
letters are acceptable. The assemblers are case sensi-
tive, i.e. ABCD and abcd are different symbols. (The
assemblers can be made case insensitive by recompiling
with the appropriate switches.)
2. The digits 0 through 9
3. The characters . (period), $ (dollar sign), and _ (un-
derscore).
4. The special characters listed in Tables 1 through 6.
Tables 1 through 6 describe the various ASxxxx label and
field terminators, assignment operators, operand separators, as-
sembly, unary, binary, and radix operators.
THE ASSEMBLER PAGE 1-7
SYMBOLS AND EXPRESSIONS
Table 1 Label Terminators and Assignment Operators
----------------------------------------------------------------
: Colon Label terminator.
:: Double colon Label Terminator; defines the
label as a global label.
= Equal sign Direct assignment operator.
== Double equal Direct assignment operator;
sign defines the symbol as a global
symbol.
----------------------------------------------------------------
Table 2 Field Terminators and Operand Separators
----------------------------------------------------------------
Tab Item or field terminator.
Space Item or field terminator.
, Comma Operand field separator.
; Semicolon Comment field indicator.
----------------------------------------------------------------
Table 3 Assembler Operators
----------------------------------------------------------------
# Number sign Immediate expression indicator.
. Period Current location counter.
( Left parenthesis Expression delimiter.
) Right parenthesis Expression delimeter.
----------------------------------------------------------------
THE ASSEMBLER PAGE 1-8
SYMBOLS AND EXPRESSIONS
Table 4 Unary Operators
----------------------------------------------------------------
< Left bracket <FEDC Produces the lower byte
value of the expression.
(DC)
> Right bracket >FEDC Produces the upper byte
value of the expression.
(FE)
+ Plus sign +A Positive value of A
- Minus sign -A Produces the negative
(2's complement) of A.
~ Tilde ~A Produces the 1's comple-
ment of A.
' Single quote 'D Produces the value of
the character D.
" Double quote "AB Produces the double byte
value for AB.
\ Backslash '\n Unix style characters
\b, \f, \n, \r, \t
or '\001 or octal byte values.
----------------------------------------------------------------
THE ASSEMBLER PAGE 1-9
SYMBOLS AND EXPRESSIONS
Table 5 Binary Operators
----------------------------------------------------------------
<< Double 0800 << 4 Produces the 4 bit
Left bracket left-shifted value of
0800. (8000)
>> Double 0800 >> 4 Produces the 4 bit
Right bracket right-shifted value of
0800. (0080)
+ Plus sign A + B Arithmetic Addition
operator.
- Minus sign A - B Arithmetic Subtraction
operator.
* Asterisk A * B Arithmetic Multiplica-
tion operator. (signed
16-bit)
/ Slash A / B Arithmetic Division
operator. (signed
16-bit quotient)
& Ampersand A & B Logical AND operator.
| Bar A | B Logical OR operator.
% Percent sign A % B Modulus operator.
(16-bit value)
^ Up arrow or A ^ B EXCLUSIVE OR operator.
circumflex
----------------------------------------------------------------
THE ASSEMBLER PAGE 1-10
SYMBOLS AND EXPRESSIONS
Table 6 Temporary Radix Operators
----------------------------------------------------------------
0b, 0B Binary radix operator.
0@, 0o, 0O, 0q, 0Q Octal radix operator.
0d, 0D Decimal radix operator.
0h, 0H, 0x, 0X Hexidecimal radix operator.
Potential ambiguities arising from the use of 0b and 0d
as temporary radix operators may be circumvented by pre-
ceding all non-prefixed hexidecimal numbers with 00.
Leading 0's are required in any case where the first
hexidecimal digit is abcdef as the assembler will treat
the letter sequence as a label.
----------------------------------------------------------------
1.3.2 User-Defined Symbols
User-defined symbols are those symbols that are equated to a
specific value through a direct assignment statement or appear
as labels. These symbols are added to the User Symbol Table as
they are encountered during assembly.
The following rules govern the creation of user-defined symbols:
1. Symbols can be composed of alphanumeric characters,
dollar signs ($), periods (.), and underscores (_)
only.
2. The first character of a symbol must not be a number
(except in the case of local symbols).
3. The first eight characters of a symbol must be unique.
A symbol can be written with more than eight legal
characters, but the ninth and subsequent characters are
ignored.
4. Spaces and Tabs must not be embedded within a symbol.
THE ASSEMBLER PAGE 1-11
SYMBOLS AND EXPRESSIONS
1.3.3 Local Symbols
Local symbols are specially formatted symbols used as labels
within a block of coding that has been delimited as a local sym-
bol block. Local symbols are of the form n$, where n is a
decimal integer from 0 to 255, inclusive. Examples of local
symbols are:
1$
27$
138$
244$
The range of a local symbol block consists of those state-
ments between two normally constructed symbolic labels. Note
that a statement of the form:
ALPHA = EXPRESSION
is a direct assignment statement but does not create a label and
thus does not delimit the range of a local symbol block.
Note that the range of a local symbol block may extend across
program areas.
Local symbols provide a convenient means of generating labels
for branch instructions and other such references within local
symbol blocks. Using local symbols reduces the possibility of
symbols with multiple definitions appearing within a user pro-
gram. In addition, the use of local symbols differentiates
entry-point labels from local labels, since local labels cannot
be referenced from outside their respective local symbol blocks.
Thus, local symbols of the same name can appear in other local
symbol blocks without conflict. Local symbols require less sym-
bol table space than normal symbols. Their use is recommended.
The use of the same local symbol within a local symbol block
will generate one or both of the m or p errors.
THE ASSEMBLER PAGE 1-12
SYMBOLS AND EXPRESSIONS
Example of local symbols:
a: ldx #atable ;get table address
lda #0d48 ;table length
1$: clr ,x+ ;clear
deca
bne 1$
b: ldx #btable ;get table address
lda #0d48 ;table length
1$: clr ,x+ ;clear
deca
bne 1$
1.3.4 Current Location Counter
The period (.) is the symbol for the current location coun-
ter. When used in the operand field of an instruction, the
period represents the address of the first byte of the
instruction:
AS: ldx #. ;The period (.) refers to
;the address of the ldx
;instruction.
When used in the operand field of an ASxxxx directive, it
represents the address of the current byte or word:
QK = 0
.word 0xFFFE,.+4,QK ;The operand .+4 in the .word
;directive represents a value
;stored in the second of the
;three words during assembly.
If we assume the current value of the program counter is
0H0200, then during assembly, ASxxxx reserves three words of
storage starting at location 0H0200. The first value, a hex-
idecimal constant FFFE, will be stored at location 0H0200. The
second value represented by .+4 will be stored at location
0H0202, its value will be 0H0206 ( = 0H0202 + 4). The third
value defined by the symbol QK will be placed at location
0H0204.
At the beginning of each assembly pass, ASxxxx resets the lo-
cation counter. Normally, consecutive memory locations are as-
signed to each byte of object code generated. However, the
value of the location counter can be changed through a direct
assignment statement of the following form:
THE ASSEMBLER PAGE 1-13
SYMBOLS AND EXPRESSIONS
. = . + expression
The new location counter can only be specified relative to
the current location counter. Neglecting to specify the current
program counter along with the expression on the right side of
the assignment operator will generate the (.) error. (Absolute
program areas may use the .org directive to specify the absolute
location of the current program counter.)
The following coding illustrates the use of the current location
counter:
.area CODE1 (ABS) ;program area CODE1
;is ABSOLUTE
.org 0H100 ;set location to
;0H100 absolute
num1: ldx #.+0H10 ;The label num1 has
;the value 0H100.
;X is loaded with
;0H100 + 0H10
.org 0H130 ;location counter
;set to 0H130
num2: ldy #. ;The label num2 has
;the value 0H130.
;Y is loaded with
;value 0H130.
.area CODE2 (REL) ;program area CODE2
;is RELOCATABLE
. = . + 0H20 ;Set location counter
;to relocatable 0H20 of
;the program section.
num3: .word 0 ;The label num3 has
;the value
;of relocatable 0H20.
. = . + 0H40 ;will reserve 0H40
;bytes of storage as will
.blkb 0H40 ;or
.blkw 0H20
The .blkb and .blkw directives are the preferred methods of
allocating space.
THE ASSEMBLER PAGE 1-14
SYMBOLS AND EXPRESSIONS
1.3.5 Numbers
ASxxxx assumes that all numbers in the source program are to
be interpreted in decimal radix unless otherwise specified. The
.radix directive may be used to specify the default as octal,
decimal, or hexidecimal. Individual numbers can be designated
as binary, octal, decimal, or hexidecimal through the temporary
radix prefixes shown in table 6.
Negative numbers must be preceeded by a minus sign; ASxxxx
translates such numbers into two's complement form. Positive
numbers may (but need not) be preceeded by a plus sign.
Numbers are always considered to be absolute values, therefor
they are never relocatable.
1.3.6 Terms
A term is a component of an expression and may be one of the
following:
1. A number.
2. A symbol:
1. A period (.) specified in an expression causes the
current location counter to be used.
2. A User-defined symbol.
3. An undefined symbol is assigned a value of zero and
inserted in the User-Defined symbol table as an un-
defined symbol.
3. A single quote followed by a single ascii character, or
a double quote followed by two ascii characters.
4. An expression enclosed in parenthesis. Any expression
so enclosed is evaluated and reduced to a single term
before the remainder of the expression in which it ap-
pears is evaluated. Parenthesis, for example, may be
used to alter the left-to-right evaluation of expres-
sions, (as in A*B+C versus A*(B+C)), or to apply a un-
ary operator to an entire expression (as in -(A+B)).
5. A unary operator followed by a symbol or number.
THE ASSEMBLER PAGE 1-15
SYMBOLS AND EXPRESSIONS
1.3.7 Expressions
Expressions are combinations of terms joined together by
binary operators. Expressions reduce to a 16-bit value. The
evaluation of an expression includes the determination of its
attributes. A resultant expression value may be one of three
types (as described later in this section): relocatable, ab-
solute, and external.
Expressions are evaluate with an operand hierarchy as follows:
* / % multiplication,
division, and
modulus first.
+ - addition and
subtraction second.
<< >> left shift and
right shift third.
^ exclusive or fourth.
& logical and fifth.
| logical or last
except that unary operators take precedence over binary
operators.
A missing or illegal operator terminates the expression
analysis, causing error codes (o) and/or (q) to be generated
depending upon the context of the expression itself.
At assembly time the value of an external (global) expression
is equal to the value of the absolute part of that expression.
For example, the expression external+4, where 'external' is an
external symbol, has the value of 4. This expression, however,
when evaluated at link time takes on the resolved value of the
symbol 'external', plus 4.
Expressions, when evaluated by ASxxxx, are one of three
types: relocatable, absolute, or external. The following dis-
tinctions are important:
1. An expression is relocatable if its value is fixed re-
lative to the base address of the program area in which
it appears; it will have an offset value added at link
time. Terms that contain labels defined in relocatable
program areas will have a relocatable value;
THE ASSEMBLER PAGE 1-16
SYMBOLS AND EXPRESSIONS
similarly, a period (.) in a relocatable program area,
representing the value of the current program location
counter, will also have a relocatable value.
2. An expression is absolute if its value is fixed. An
expression whose terms are numbers and ascii characters
will reduce to an absolute value. A relocatable ex-
pression or term minus a relocatable term, where both
elements being evaluated belong to the same program
area, is an absolute expression. This is because every
term in a program area has the same relocation bias.
When one term is subtracted from the other the reloca-
tion bias is zero.
3. An expression is external (or global) if it contains a
single global reference (plus or minus an absolute ex-
pression value) that is not defined within the current
program. Thus, an external expression is only par-
tially defined following assembly and must be resolved
at link time.
1.4 GENERAL ASSEMBLER DIRECTIVES
An ASxxxx directive is placed in the operator field of the
source line. Only one directive is allowed per source line.
Each directive may have a blank operand field or one or more
operands. Legal operands differ with each directive.
1.4.1 .module Directive
Format:
.module string
The .module directive causes the string to be included in the
assemblers output file as an identifier for this particular ob-
ject module. The string may be from 1 to 8 characters in
length. Only one identifier is allowed per assembled module.
The main use of this directive is to allow the linker to report
a modules' use of undefined symbols. At link time all undefined
symbols are reported and the modules referencing them are
listed.
THE ASSEMBLER PAGE 1-17
GENERAL ASSEMBLER DIRECTIVES
1.4.2 .title Directive
Format:
.title string
The .title directive provides a character string to be placed
on the second line of each page during listing.
1.4.3 .sbttl Directive
Format:
.sbttl string
The .sbttl directive provides a character string to be placed
on the third line of each page during listing.
1.4.4 .page Directive
Format:
.page
The .page directive causes a page ejection with a new heading
to be printed. The new page occurs after the next line of the
source program is processed, this allows an immediately follow-
ing .sbttl directive to appear on the new page. The .page
source line will not appear in the file listing.
1.4.5 .byte and .db Directives
Format:
.byte exp ;Stores the binary value
.db exp ;of the expression in the
;next byte.
.byte exp1,exp2,expn ;Stores the binary values
.db exp1,exp2,expn ;of the list of expressions
;in successive bytes.
where: exp, represent expressions that will be
exp1, truncated to 8-bits of data.
. Each expression will be calculated
. as a 16-bit word expression,
. the high-order byte will be truncated.
. Multiple expressions must be
expn separated by commas.
THE ASSEMBLER PAGE 1-18
GENERAL ASSEMBLER DIRECTIVES
The .byte or .db directives are used to generate successive
bytes of binary data in the object module.
1.4.6 .word and .dw Directives
Format:
.word exp ;Stores the binary value
.dw exp ;of the expression in
;the next word.
.word exp1,exp2,expn ;Stores the binary values
.dw exp1,exp2,expn ;of the list of expressions
;in successive words.
where: exp, represent expressions that will occupy two
exp1, bytes of data. Each expression will be
. calculated as a 16-bit word expression.
. Multiple expressions must be
expn separated by commas.
The .word or .dw directives are used to generate successive
words of binary data in the object module.
1.4.7 .blkb, .blkw, and .ds Directives
Format:
.blkb N ;reserve N bytes of space
.blkw N ;reserve N words of space
.ds N ;reserve N bytes of space
The .blkb and .ds directives reserve byte blocks in the ob-
ject module; the .blkw directive reserves word blocks.
1.4.8 .ascii Directive
Format:
.ascii /string/
where: string is a string of printable ascii characters.
/ / represent the delimiting characters. These
delimiters may be any paired printing
characters, as long as the characters are not
contained within the string itself. If the
delimiting characters do not match, the .ascii
directive will give the (q) error.
THE ASSEMBLER PAGE 1-19
GENERAL ASSEMBLER DIRECTIVES
The .ascii directive places one binary byte of data for each
character in the string into the object module.
1.4.9 .asciz Directive
Format:
.asciz /string/
where: string is a string of printable asciz characters.
/ / represent the delimiting characters. These
delimiters may be any paired printing
characters, as long as the characters are not
contained within the string itself. If the
delimiting characters do not match, the .asciz
directive will give the (q) error.
The .ascii directive places one binary byte of data for each
character in the string into the object module. Following all
the character data a zero byte is inserted to terminate the
character string.
1.4.10 .radix Directive
Format:
.radix character
where: character represents a single character specifying the
default radix to be used for succeeding numbers.
The character may be any one of the following:
B,b Binary
O,o Octal
Q,q
@
D,d Decimal
'blank'
H,h Hexidecimal
X,x
THE ASSEMBLER PAGE 1-20
GENERAL ASSEMBLER DIRECTIVES
1.4.11 .even Directive
Format:
.even
The .even directive ensures that the current location counter
contains an even boundary value by adding 1 if the current loca-
tion is odd.
1.4.12 .odd Directive
Format:
.odd
The .odd directive ensures that the current location counter
contains an odd boundary value by adding one if the current lo-
cation is even.
1.4.13 .area Directive
Format:
.area name [(options)]
where: name represents the symbolic name of the program sec-
tion. This name may be the same as any
user-defined symbol as the area names are in-
dependent of all symbols and labels.
options specify the type of program or data area:
ABS absolute (automatically invokes OVR)
REL relocatable
OVR overlay
CON concatenate
PAG paged area
The .area directive provides a means of defining and separat-
ing multiple programming and data sections. The name is the
area label used by the assembler and the linker to collect code
from various separately assembled modules into one section. The
name may be from 1 to 8 characters in length.
The options are specified within parenthesis and separated by
commas as shown in the following example:
.area TEST (REL,CON) ;This section is relocatable
;and concatenated with other
THE ASSEMBLER PAGE 1-21
GENERAL ASSEMBLER DIRECTIVES
;sections of this program area.
.area DATA (REL,OVR) ;This section is relocatable
;and overlays other sections
;of this program area.
.area SYS (ABS,OVR) ;(CON not allowed with ABS)
;This section is defined as
;absolute. Absolute sections
;are always overlayed with
;other sections of this program
;area.
.area PAGE (PAG) ;This is a paged section. The
;section must be on a 256 byte
;boundary and its length is
;checked by the linker to be
;no larger than 256 bytes.
;This is useful for direct page
;areas.
The default area type is REL|CON; i.e. a relocatable sec-
tion which is concatenated with other sections of code with the
same area name. The ABS option indicates an absolute area. The
OVR and CON options indicate if program sections of the same
name will overlay each other (start at the same location) or be
concatenated with each other (appended to each other).
Multiple invocations of the .area directive with the same
name must specify the same options or leave the options field
blank, this defaults to the previously specified options for
this program area.
The ASxxxx assemblers automatically provide two program
sections:
'. .ABS.' This dumby section contains all absolute
symbols and their values.
'_CODE' This is the default program/data area.
This program area is of type (REL,CON).
THE ASSEMBLER PAGE 1-22
GENERAL ASSEMBLER DIRECTIVES
1.4.14 .org Directive
Format:
.org exp
where: exp is an absolute expression that becomes the cur-
rent location counter.
The .org directive is valid only in an absolute program section
and will give a (q) error if used in a relocatable program area.
The .org directive specifies that the current location counter
is to become the specified absolute value.
1.4.15 .globl Directive
Format:
.globl sym1,sym2,...,symn
where: sym1, represent legal symbolic names. When
sym2,... When multiple symbols are specified,
symn they are separated by commas.
A .globl directive may also have a label field and/or a com-
ment field.
The .globl directive is provided to define (and thus provide
linkage to) symbols not otherwise defined as global symbols
within a module. In defining global symbols the directive
.globl J is similar to:
J == expression or J::
Because object modules are linked by global symbols, these
symbols are vital to a program. All internal symbols appearing
within a given program must be defined at the end of pass 1 or
they will be considered undefined. The assembly directive (-g)
can be be invoked to make all undefined symbols global at the
end of pass 1.
THE ASSEMBLER PAGE 1-23
GENERAL ASSEMBLER DIRECTIVES
1.4.16 .if, .else, and .endif Directives
Format:
.if expr
. ;}
. ;} range of true condition
. ;}
.else
. ;}
. ;} range of false condition
. ;}
.endif
The conditional assembly directives allow you to include or
exclude blocks of source code during the assembly process, based
on the evaluation of the condition test.
The range of true condition will be processed if the expres-
sion 'expr' is not zero (i.e. true) and the range of false con-
dition will be processed if the expression 'expr' is zero (i.e
false). The range of true condition is optional as is the .else
directive and the range of false condition. The following are
all valid .if/.else/.endif constructions:
.if A-4 ;evaluate A-4
.byte 1,2 ;insert bytes if A-4 is
.endif ;not zero
.if K+3 ;evaluate K+3
.else
.byte 3,4 ;insert bytes if K+3
.endif ;is zero
.if J&3 ;evaluate J masked by 3
.byte 12 ;insert this byte if J&3
.else ;is not zero
.byte 13 ;insert this byte if J&3
.endif ;is zero
The .if/.else/.endif directives may be nested upto 10 levels.
The .page directive is processed within a false condition
range to allow extended textual information to be incorporated
in the source program with out the need to use the comment
delimiter (;):
.if 0
.page
This text will be bypassed during assembly
THE ASSEMBLER PAGE 1-24
GENERAL ASSEMBLER DIRECTIVES
but appear in the listing file.
.
.
.
.endif
1.4.17 .include Directive
Format:
.include string
where: string represents a delimited string that is the file
specification of an ASxxxx source file.
The .include directive is used to insert a source file within
the source file currently being assembled. When this directive
is encountered, an implicit .page directive is issued. When the
end of the specified source file is reached, an implicit .page
directive is issued and input continues from the previous source
file. The maximum nesting level of source files specified by a
.include directive is five. The line containing the .include
directive will not appear in the listing file.
The total number of separately specified .include files is
unlimited as each .include file is opened and then closed during
each pass made by the assembler.
1.4.18 .setdp Directive
Format:
.setdp [base [,area]]
The set direct page directive has a common format in all the
AS68xx assemblers. The .setdp directive is used to inform the
assembler of the current direct page region and the offset ad-
dress within the selected area. The normal invocation methods
are:
.area DIRECT (PAG)
.setdp
or
.setdp 0,DIRECT
for all the 68xx microprocessors (the 6804 has only the paged
ram area). The commands specify that the direct page is in area
THE ASSEMBLER PAGE 1-25
GENERAL ASSEMBLER DIRECTIVES
DIRECT and its offset address is 0 (the only valid value for all
but the 6809 microprocessor). Be sure to place the DIRECT area
at address 0 during linking. When the base address and area are
not specified, then zero and the current area are the defaults.
If a .setdp directive is not issued the assembler defaults the
direct page to the area "_CODE" at offset 0.
The assembler verifies that any local variable used in a
direct variable reference is located in this area. Local vari-
able and constant value direct access addresses are checked to
be within the address range from 0 to 255.
External direct references are assumed by the assembler to be
in the correct area and have valid offsets. The linker will
check all direct page relocations to verify that they are within
the correct area.
The 6809 microprocessor allows the selection of the direct
page to be on any 256 byte boundary by loading the appropriate
value into the dp register. Typically one would like to select
the page boundary at link time, one method follows:
.area DIRECT (PAG) ; define the direct page
.setdp
.
.
.
.area PROGRAM
.
ldd #DIRECT ; load the direct page register
tfr a,dp ; for access to the direct page
At link time specify the base and global equates to locate the
direct page:
-b DIRECT = 0x1000
-g DIRECT = 0x1000
Both the area address and offset value must be specified (area
and variable names are independent). The linker will verify
that the relocated direct page accesses are within the direct
page.
THE ASSEMBLER PAGE 1-26
GENERAL ASSEMBLER DIRECTIVES
The preceeding sequence could be repeated for multiple paged
areas, however an alternate method is to define a non-paged area
and use the .setdp directive to specify the offset value:
.area DIRECT ; define non-paged area
.
.
.
.area PROGRAM
.
.setdp 0,DIRECT ; direct page area
ldd #DIRECT ; load the direct page register
tfr a,dp ; for access to the direct page
.
.
.setdp 0x100,DIRECT ; direct page area
ldd #DIRECT+0x100 ; load the direct page register
tfr a,dp ; for access to the direct page
The linker will verify that subsequent direct page references
are in the specified area and offset address range. It is the
programmers responsibility to load the dp register with the cor-
rect page segment corresponding to the .setdp base address
specified.
For those cases where a single piece of code must access a
defined data structure within a direct page and there are many
pages, define a dumby direct page linked at address 0. This
dumby page is used only to define the variable labels. Then
load the dp register with the real base address but donot use a
.setdp directive. This method is equivalent to indexed address-
ing, where the dp register is the index register and the direct
addressing is the offset.
1.5 INVOKING ASXXXX
The ASxxxx assemblers are command line oriented. After the
assembler is started, enter the option(s) and file(s) to assem-
ble following the 'argv:' prompt:
argv: [-dqxgalosf] file1 [file2 file3 ... file6]
The options are:
d decimal listing
q octal listing
x hex listing (default)
The listing radix affects the
.lst, .rel, and .sym files.
THE ASSEMBLER PAGE 1-27
INVOKING ASXXXX
g undefined symbols made global
a all user symbols made global
l create list output file1.lst
o create object output file1.rel
s create symbol output file1.sym
f flag relocatable references by ` in the list-
ing file
ff flag relocatable references by mode in the list-
ing file
The file name for the .lst, .rel, and .sym files is the first
file name specified in the command line. All output files are
ascii text files which may be edited, copied, etc. The output
files are the concatenation of all the input files, if files are
to be assembled independently invoke the assembler for each
file.
The .rel file contains a radix directive so that the linker
will use the proper conversion for this file. Linked files may
have different radices.
If the list (l) option is specified without the symbol table
(s) option, the symbol table is placed at the end of the listing
file.
1.6 ERRORS
The ASxxxx assemblers provide limited diagnostic error codes
during the assembly process, these errors will be noted in the
listing file and printed on the stderr device. The errors are:
(.) This error is caused by an absolute direct assign-
ment of the current location counter
. = expression (incorrect)
rather than the correct
. = . + expression
(a) Indicates a machine specific addressing or address-
ing mode error.
(b) Indicates a direct page boundary error.
(d) Indicates a direct page addressing error.
(i) Caused by an .include file error or an .if/.endif
mismatch.
THE ASSEMBLER PAGE 1-28
ERRORS
(m) Multiple definitions of the same label, multiple
.module directives, or multiple conflicting attri-
butes in an .area directive.
(o) Directive or mnemonic error or the use of the .org
directive in a relocatable area.
(p) Phase error: label location changing between passes
2 and 3. Normally caused by having more than one
level of forward referencing.
(q) Questionable syntax: missing or improper operators,
terminators, or delimiters.
(r) Relocation error: logic operation attempted on a
relocatable term, addition of two relocatable terms,
subtraction of two relocatable terms not within the
same programming area or external symbols.
(u) Undefined symbol encountered during assembly.
1.7 LISTING FILE
The (-l) option produces an ascii output listing file. Each
page of output contains a four line header:
1. The ASxxxx program name and page number
2. Title from a .title directive (if any)
3. Subtitle from a .sbttl directive (if any)
4. Blank line
Each succeeding line contains five fields:
1. Error field (first three characters of line)
2. Current location counter
3. Generated code in byte format
4. Source text line number
5. Source text
THE ASSEMBLER PAGE 1-29
LISTING FILE
The error field may contain upto 2 error flags indicating any
errors encountered while assembling this line of source code.
The current location counter field displays the 16-bit pro-
gram position. This field will be in the selected radix.
The generated code follows the program location. The listing
radix determines the number of bytes that will be displayed in
this field. Hexidecimal listing allows six bytes of data within
the field, decimal and octal allow four bytes within the field.
If more than one field of data is generated from the assembly of
a single line of source code, then the data field is repeated on
successive lines.
The source text line number is printed in decimal and is fol-
lowed by the source text.
Two special cases will disable the listing of a line of
source text:
1. Source line with a .page directive is never listed.
2. Source line with a .include file directive is not
listed unless the .include file cannot be opened.
Two data field options are available to flag those bytes
which will be relocated by the linker. If the -f option is
specified then each byte to be relocated will be preceeded by
the '`' character. If the -ff option is specified then each
byte to be relocated will be preceeded by one of the following
characters:
1. * paged relocation
2. u unsigned byte relocation
3. p PCR byte or low byte of word relocation
4. q PCR high byte of word relocation
5. r low byte relocation
6. s high byte relocation
THE ASSEMBLER PAGE 1-30
SYMBOL TABLE FILE
1.8 SYMBOL TABLE FILE
The symbol table has two parts:
1. The alphabetically sorted list of symbols and/or labels
defined or referenced in the source program.
2. A list of the program areas defined during assembly of
the source program.
The sorted list of symbols and/or labels contains the follow-
ing information:
1. Program area number (none if absolute value or exter-
nal)
2. The symbol or label
3. Directly assigned symbol is denoted with an (=) sign
4. The value of a symbol, location of a label relative to
the program area base address (=0), or a **** indicat-
ing the symbol or label is undefined.
5. The characters: G - global, R - relocatable, and X -
external.
The list of program areas provides the correspondence between
the program area numbers and the defined program areas, the size
of the program areas, and the area flags (attributes).
1.9 OBJECT FILE
The object file is an ascii file containing the information
needed by the linker to bind multiple object modules into a com-
plete loadable memory image. The object module contains the
following designators:
[XDQ][HL]
X Hexidecimal radix
D Decimal radix
Q Octal radix
H Most significant byte first
L Least significant byte first
H Header
THE ASSEMBLER PAGE 1-31
OBJECT FILE
M Module
A Area
S Symbol
T Object code
R Relocation information
P Paging information
Refer to the linker for a detailed description of each of the
designators and the format of the information contained in the
object file.
CHAPTER 2
THE LINKER
2.1 ASLINK RELOCATING LINKER
ASLINK is the companion linker for the ASxxxx assemblers.
The program ASLINK is a general relocating linker performing
the following functions:
1. Bind multiple object modules into a single memory image
2. Resolve inter-module symbol references
3. Combine code belonging to the same area from multiple
object files into a single contiguous memory region
4. Perform byte and word program counter relative
(pc or pcr) addressing calculations
5. Define absolute symbol values at link time
6. Define absolute area base address values at link time
7. Produce Intel Hex or Motorola S19 output file
8. Produce a map of the linked memory image
THE LINKER PAGE 2-2
INVOKING ASLINK
2.2 INVOKING ASLINK
The linker may run in the command line mode or command file
modes. The allowed startup linker commands are:
-c/-f command line / command file modes
-p/-n enable/disable echo file.lnk input to stdout
If command line mode is selected, all linker commands come
from stdin, if the command file mode is selected the commands
are input from the specified file (extension must be .lnk).
The linker is started via
ASLINK -(cfpn)
After invoking the linker the valid options are:
1. -i/-s Intel Hex (file.ihx) or Motorola S19 (file.s19)
image output file.
2. -m Generate a map file (file.map). This file con-
tains a list of the symbols (by area) with absolute ad-
dresses, sizes of linked areas, and other linking
information.
3. -xdq Specifies the number radix for the map file
(Hexidecimal, Decimal, or Octal).
4. fileN Files to be linked. Files may be on the same
line as the above options or on a separate line(s) one
file per line or multiple files separated by spaces or
tabs.
5. -b area = expression (one definition per line)
This specifies an area base address where the expres-
sion may contain constants and/or defined symbols from
the linked files.
6. -g symbol = expression (one definition per line)
This specifies the value for the symbol where the ex-
pression may contain constants and/or defined symbols
from the linked files.
7. -e or null line, terminates input to the linker.
THE LINKER PAGE 2-3
ASLINK PROCESSING
2.3 ASLINK PROCESSING
The linker processes the files in the order they are
presented. The first pass through the input files is used to
define all program areas, the section area sizes, and symbols
defined or referenced. After the first pass the -b (area base
address) definitions, if any, are processed and the areas
linked.
The area linking proceeds by first examining the area types
ABS, CON, REL, OVR and PAG. Absolute areas (ABS) from separate
object modules are always overlayed and have been assembled at a
specific address, these are not normally relocated (if a -b com-
mand is used on an absolute area the area will be relocated).
Relative areas (normally defined as REL|CON) have a base address
of 0x0000 as read from the object files, the -b command speci-
fies the beginning address of the area. All subsequent relative
areas will be concatenated with proceeding relative areas.
Where specific ordering is desired, the first linker input file
should have the area definitions in the desired order. At the
completion of the area linking all area addresses and lengths
have been determined. The areas of type PAG are verified to be
on a 256 byte boundary and that the length does not exceed 256
bytes. Any errors are noted on stderr and in the map file.
Next the global symbol definitions (-g option), if any, are
processed. The symbol definitions have been delayed until this
point because the absolute addresses of all internal symbols are
known and can be used in the expression calculations.
Before continuing with the linking process the symbol table
is scanned to determine if any symbols have been referenced but
not defined. Undefined symbols are listed on the stderr device.
if a .module directive was included in the assembled file the
module making the reference to this undefined variable will be
printed.
Constants defined as global in more than one module will be
flagged as multiple definitions if their values are not identi-
cal.
After the preceeding processes are complete the linker may
output a map file (-m option). This file provides the following
information:
1. Global symbol values and label absolute addresses
2. Defined areas and there lengths
3. Remaining undefined symbols
THE LINKER PAGE 2-4
ASLINK PROCESSING
4. List of modules linked
5. List of -b and -g definitions
The final step of the linking process is performed during the
second pass of the input files. As the xxx.rel files are read
the code is relocated by substituting the physical addresses for
the referenced symbols and areas and may be output in Intel or
Motorola formats. The number of files linked and symbols de-
fined/referenced is limited by the processor space available to
build the area/symbol lists.
2.4 LINKER INPUT FORMAT
The linkers' input object file is an ascii file containing
the information needed by the linker to bind multiple object
modules into a complete loadable memory image.
The object module contains the following designators:
[XDQ][HL]
X Hexidecimal radix
D Decimal radix
Q Octal radix
H Most significant byte first
L Least significant byte first
H Header
M Module
A Area
S Symbol
T Object code
R Relocation information
P Paging information
THE LINKER PAGE 2-5
LINKER INPUT FORMAT
2.4.1 Object Module Format
The first line of an object module contains the [XDQ][HL]
format specifier (i.e. XH indicates a hexidecimal file with
most significant byte first) for the following designators.
2.4.2 Header Line
H aa areas gg global symbols
The header line specifies the number of areas(aa) and the
number of global symbols(gg) defined or referenced in this ob-
ject module segment.
2.4.3 Module Line
M name
The module line specifies the module name from which this
header segment was assembled. The module line will not appear
if the .module directive was not used in the source program.
2.4.4 Symbol Line
S string Defnnnn
or
S string Refnnnn
The symbol line defines (Def) or references (Ref) the symbol
'string' with the value nnnn. The defined value is relative to
the current area base address. References to constants and ex-
ternal global symbols will always appear before the first area
definition. References to external symbols will have a value of
zero.
THE LINKER PAGE 2-6
LINKER INPUT FORMAT
2.4.5 Area Line
A label size ss flags ff
The area line defines the area label, the size (ss) of the
area in bytes, and the area flags (ff). The area flags specify
the ABS, REL, CON, OVR, and PAG parameters:
OVR/CON (0x04/0x00 i.e. bit position 2)
ABS/REL (0x08/0x00 i.e. bit position 3)
PAG (0x10 i.e. bit position 4)
2.4.6 T Line
T xx xx nn nn nn nn nn ...
The T line contains the assembled code output by the assem-
bler with xx xx being the offset address from the current area
base address and nn being the assembled instructions and data in
byte format.
2.4.7 R Line
R 0 0 nn nn n1 n2 xx xx ...
The R line provides the relocation information to the linker.
The nn nn value is the current area index, i.e. which area the
current values were assembled. Relocation information is en-
coded in groups of 4 bytes:
1. n1 is the relocation mode and object format
1. bit 0 word(0x00)/byte(0x01)
2. bit 1 relocatable area(0x00)/symbol(0x02)
3. bit 2 normal(0x00)/PC relative(0x04) relocation
4. bit 3 1-byte(0x00)/2-byte(0x08) object format for
byte data
5. bit 4 signed(0x00)/unsigned(0x10) byte data
6. bit 5 normal(0x00)/page '0'(0x20) reference
7. bit 6 normal(0x00)/page 'nnn'(0x40) reference
2. n2 is a byte index into the corresponding (i.e. pre-
ceeding) T line data (i.e. a pointer to the data to be
updated by the relocation). The T line data may be
1-byte or 2-byte byte data format or 2-byte word
format.
THE LINKER PAGE 2-7
LINKER INPUT FORMAT
3. xx xx is the area/symbol index for the area/symbol be-
ing referenced. the corresponding area/symbol is found
in the header area/symbol lists.
The groups of 4 bytes are repeated for each item requiring relo-
cation in the preceeding T line.
2.4.8 P Line
P 0 0 nn nn n1 n2 xx xx
The P line provides the paging information to the linker as
specified by a .setdp directive. The format of the relocation
information is identical to that of the R line. The correspond-
ing T line has the following information:
T xx xx aa aa bb bb
Where aa aa is the area reference number which specifies the
selected page area and bb bb is the base address of the page.
bb bb will require relocation processing if the 'n1 n2 xx xx' is
specified in the P line. The linker will verify that the base
address is on a 256 byte boundary and that the page length of an
area defined with the PAG type is not larger than 256 bytes.
The linker defaults any direct page references to the first
area defined in the input REL file. All ASxxxx assemblers will
specify the _CODE area first, making this the default page area.
2.5 LINKER ERROR MESSAGES
The linker provides detailed error messages allowing the pro-
grammer to quickly find the errant code. As the linker com-
pletes pass 1 over the input file(s) it reports any page
boundary or page length errors as follows:
?ASlink-W-Paged Area PAGE0 Boundary Error
and/or
?ASlink-W-Paged Area PAGE0 Length Error
where PAGE0 is the paged area.
During Pass two the linker reads the T, R, and P lines per-
forming the necessary relocations and outputting the absolute
code. Various errors may be reported during this process
THE LINKER PAGE 2-8
LINKER ERROR MESSAGES
The P line processing can produce only one possible error:
?ASlink-W-Page Definition Boundary Error
file module pgarea pgoffset
PgDef t6809l t6809l PAGE0 0001
The error message specifies the file and module where the .setdp
direct was issued and indicates the page area and the page
offset value determined after relocation.
The R line processing produces various errors:
?ASlink-W-Byte PCR relocation error for symbol bra2
file module area offset
Refby t6809l t6809l TEST 00FE
Defin tconst tconst . .ABS. 0080
?ASlink-W-Unsigned Byte error for symbol two56
file module area offset
Refby t6800l t6800l DIRECT 0015
Defin tconst tconst . .ABS. 0100
?ASlink-W-Page0 relocation error for symbol ltwo56
file module area offset
Refby t6800l t6800l DIRECT 000D
Defin tconst tconst DIRECT 0100
?ASlink-W-Page Mode relocation error for symbol two56
file module area offset
Refby t6809l t6809l DIRECT 0005
Defin tconst tconst . .ABS. 0100
?ASlink-W-Page Mode relocation error
file module area offset
Refby t Pagetest PROGRAM 0006
Defin t Pagetest DIRECT 0100
These error messages specify the file, module, area, and offset
within the area of the code referencing (Refby) and defining
(Defin) the symbol. If the symbol is defined in the same module
as the reference the linker is unable to report the symbol name.
The assembler listing file(s) should be examined at the offset
from the specified area to located the offending code.
The errors are:
1. The byte PCR error is caused by exceeding the pc rela-
tive byte branch range.
2. The Unsigned byte error indicates an indexing value was
negative or larger than 255.
THE LINKER PAGE 2-9
LINKER ERROR MESSAGES
3. The Page0 error is generated if the direct page vari-
able is not in the page0 range of 0 to 255.
4. The page mode error is generated if the direct variable
is not within the current direct page (6809).
CHAPTER 3
BUILDING ASXXXX AND ASLINK
The assemblers and linker have been successfully compiled us-
ing the DECUS C (PDP-11) compiler (patch level 9) with
RT-11/TSX+, Eyring Research Institute, Inc. PDOS (680x0) C
V5.4b compiler, and with Borland's Turbo C V1.5 with MS-DOS
(80x86).
The device specific header file (i.e. m6800.h, m6801.h,
etc.) contains the DECUS C 'BUILD' directives for generating a
command file to compile, assemble, and link the necessary files
to prepare an executable image for a particular assembler.
3.1 BUILDING AN ASSEMBLER
The building of a typical assembler (6809 for example) re-
quires the following files:
1. M6809.H
2. M09EXT.C
3. M09MCH.C
4. M09ADR.C
5. M09PST.C
6. ASM.H
7. ASMAIN.C
8. ASLEX.C
9. ASSYM.C
10. ASSUBR.C
11. ASEXPR.C
12. ASDATA.C
13. ASLIST.C
14. ASOUT.C
The first five files are the 6809 processor dependent sec-
tions which contain the following:
BUILDING ASXXXX AND ASLINK PAGE 3-2
BUILDING AN ASSEMBLER
1. m6809.h - header file containing the machine specific
definitions of constants, variables, structures, and
types
2. m09ext - device description, byte order, and file ex-
tension information
3. m09pst - a table of the assembler general directives,
special device directives, and assembler mnemonics with
associated operation codes
4. m09mch / m09adr - machine specific code for processing
the device mnemonics, addressing modes, and special
directives
The remaining nine files provide the device independent sec-
tions which handle the details of file input/output, symbol
table generation, program/data areas, expression analysis, and
assembler directive processing.
The assembler defaults to the case sensitive mode. This may
be altered by changing the case sensitivity flag in asm.h to
/*
* Case Sensitivity Flag
*/
#define CASE_SENSITIVE 0
The assemblers and linker should be compiled with the same
case sensitivity option.
The DECUS C build files are asxxxx.bld and the Turbo C pro-
ject files are asxxxx.prj.
3.2 BUILDING ASLINK
The building of the linker requires the following files:
1. ASLINK.H
2. LKMAIN.C
3. LKLEX.C
4. LKAREA.C
5. LKHEAD.C
6. LKSYM.C
7. LKEVAL.C
8. LKDATA.C
9. LKLIST.C
10. LKRLOC.C
BUILDING ASXXXX AND ASLINK PAGE 3-3
BUILDING ASLINK
11. LKS19.C
12. LKIHX.C
The linker defaults to the case sensitive mode. This may be
altered by changing the case sensitivity flag in aslink.h to
/*
* Case Sensitivity Flag
*/
#define CASE_SENSITIVE 0
The linker and assemblers should be compiled with the same
case sensitivity option.
The DECUS C build file is aslink.bld and the Turbo C project
file is aslink.prj.
APPENDIX A
AS6800 ASSEMBLER
A.1 6800 REGISTER SET
The following is a list of the 6800 registers used by AS6800:
a,b - 8-bit accumulators
x - index register
A.2 6800 INSTRUCTION SET
The following tables list all 6800/6802/6808 mnemonics recog-
nized by the AS6800 assembler. The designation [] refers to a
required addressing mode argument. The following list specifies
the format for each addressing mode supported by AS6800:
#data immediate data
byte or word data
*dir direct page addressing
(see .setdp directive)
0 <= dir <= 255
,x register indirect addressing
zero offset
offset,x register indirect addressing
0 <= offset <= 255
ext extended addressing
label branch label
The terms data, dir, offset, ext, and label may all be expres-
sions.
AS6800 ASSEMBLER PAGE A-2
6800 INSTRUCTION SET
Note that not all addressing modes are valid with every in-
struction, refer to the 6800 technical data for valid modes.
A.2.1 Inherent Instructions
aba cba
clc cli
clv daa
des dex
ins inx
nop rti
rts sba
sec sei
sev swi
tab tap
tba tpa
tsx txs
wai
psha pshb
psh a psh b
pula pulb
pul a pul b
A.2.2 Branch Instructions
bra label bhi label
bls label bcc label
bhs label bcs label
blo label bne label
beq label bvc label
bvs label bpl label
bmi label bge label
blt label bgt label
ble label bsr label
AS6800 ASSEMBLER PAGE A-3
6800 INSTRUCTION SET
A.2.3 Single Operand Instructions
asla aslb
asl a asl b
asl []
asra asrb
asr a asr b
asr []
clra clrb
clr a clr b
clr []
coma comb
com a com b
com []
deca decb
dec a dec b
dec []
inca incb
inc a inc b
inc []
lsla lslb
lsl a lsl b
lsl []
lsra lsrb
lsr a lsr b
lsr []
nega negb
neg a neg b
neg []
rola rolb
rol a rol b
rol []
rora rorb
ror a ror b
ror []
tsta tstb
tst a tst b
tst []
AS6800 ASSEMBLER PAGE A-4
6800 INSTRUCTION SET
A.2.4 Double Operand Instructions
adca [] adcb []
adc a [] adc b []
adda [] addb []
add a [] add b []
anda [] andb []
and a [] and b []
bita [] bitb []
bit a [] bit b []
cmpa [] cmpb []
cmp a [] cmp b []
eora [] eorb []
eor a [] eor b []
ldaa [] ldab []
lda a [] lda b []
oraa [] orab []
ora a [] ora b []
sbca [] sbcb []
sbc a [] sbc b []
staa [] stab []
sta a [] sta b []
suba [] subb []
sub a [] sub b []
A.2.5 Jump and Jump to Subroutine Instructions
jmp [] jsr []
AS6800 ASSEMBLER PAGE A-5
6800 INSTRUCTION SET
A.2.6 Long Register Instructions
cpx []
lds [] sts []
ldx [] stx []
APPENDIX B
AS6801 ASSEMBLER
B.1 .hd6303 DIRECTIVE
Format:
.hd6303
The .hd6303 directive enables processing of the HD6303 specific
mnemonics not included in the 6801 instruction set. HD6303
mnemonics encountered without the .hd6303 directive will be
flagged with an 'o' error.
B.2 6801 REGISTER SET
The following is a list of the 6801 registers used by AS6801:
a,b - 8-bit accumulators
d - 16-bit accumulator <a:b>
x - index register
B.3 6801 INSTRUCTION SET
The following tables list all 6801/6303 mnemonics recognized
by the AS6801 assembler. The designation [] refers to a re-
quired addressing mode argument. The following list specifies
the format for each addressing mode supported by AS6801:
#data immediate data
byte or word data
*dir direct page addressing
(see .setdp directive)
0 <= dir <= 255
AS6801 ASSEMBLER PAGE B-2
6801 INSTRUCTION SET
,x register indirect addressing
zero offset
offset,x register indirect addressing
0 <= offset <= 255
ext extended addressing
label branch label
The terms data, dir, offset, ext, and label may all be expres-
sions.
Note that not all addressing modes are valid with every in-
struction, refer to the 6801/6303 technical data for valid
modes.
B.3.1 Inherent Instructions
aba abx
cba clc
cli clv
daa des
dex ins
inx mul
nop rti
rts sba
sec sei
sev swi
tab tap
tba tpa
tsx txs
wai
B.3.2 Branch Instructions
bra label brn label
bhi label bls label
bcc label bhs label
bcs label blo label
bne label beq label
bvc label bvs label
bpl label bmi label
bge label blt label
bgt label ble label
bsr label
AS6801 ASSEMBLER PAGE B-3
6801 INSTRUCTION SET
B.3.3 Single Operand Instructions
asla aslb asld
asl a asl b asl d
asl []
asra asrb
asr a asr b
asr []
clra clrb
clr a clr b
clr []
coma comb
com a com b
com []
deca decb
dec a dec b
dec []
eora eorb
eor a eor b
eor []
inca incb
inc a inc b
inc []
lsla lslb lsld
lsl a lsl b lsl d
lsl []
lsra lsrb lsrd
lsr a lsr b lsr d
lsr []
nega negb
neg a neg b
neg []
psha pshb pshx
psh a psh b psh x
pula pulb pulx
pul a pul b pul x
rola rolb
rol a rol b
rol []
AS6801 ASSEMBLER PAGE B-4
6801 INSTRUCTION SET
rora rorb
ror a ror b
ror []
tsta tstb
tst a tst b
tst []
B.3.4 Double Operand Instructions
adca [] adcb []
adc a [] adc b []
adda [] addb [] addd []
add a [] add b [] add d []
anda [] andb []
and a [] and b []
bita [] bitb []
bit a [] bit b []
cmpa [] cmpb []
cmp a [] cmp b []
ldaa [] ldab []
lda a [] lda b []
oraa [] orab []
ora a [] ora b []
sbca [] sbcb []
sbc a [] sbc b []
staa [] stab []
sta a [] sta b []
suba [] subb [] subd []
sub a [] sub b [] sub d []
AS6801 ASSEMBLER PAGE B-5
6801 INSTRUCTION SET
B.3.5 Jump and Jump to Subroutine Instructions
jmp [] jsr []
B.3.6 Long Register Instructions
cpx [] ldd []
lds [] ldx []
std [] sts []
stx []
B.3.7 6303 Specific Instructions
aim #data, [] eim #data, []
oim #data, [] tim #data, []
xgdx slp
APPENDIX C
AS6804 ASSEMBLER
Requires the .setdp directive to specify the ram area.
C.1 6804 REGISTER SET
The following is a list of the 6804 registers used by AS6804:
x,y - index registers
C.2 6804 INSTRUCTION SET
The following tables list all 6804 mnemonics recognized by
the AS6804 assembler. The designation [] refers to a required
addressing mode argument. The following list specifies the
format for each addressing mode supported by AS6804:
#data immediate data
byte or word data
,x register indirect addressing
dir direct addressing
(see .setdp directive)
0 <= dir <= 255
ext extended addressing
label branch label
The terms data, dir, and ext may be expressions. The label for
the short branchs beq, bne, bcc, and bcs must not be external.
Note that not all addressing modes are valid with every in-
struction, refer to the 6804 technical data for valid modes.
AS6804 ASSEMBLER PAGE C-2
6804 INSTRUCTION SET
C.2.1 Inherent Instructions
coma decx
decy incx
incy rola
rti rts
stop tax
tay txa
tya wait
C.2.2 Branch Instructions
bne label beq label
bcc label bcs label
C.2.3 Single Operand Instructions
add []
and []
cmp []
dec []
inc []
lda []
sta []
sub []
C.2.4 Jump and Jump to Subroutine Instructions
jsr []
jmp []
C.2.5 Bit Test Instructions
brclr #data,[],label
brset #data,[],label
bclr #label,[]
bset #label,[]
AS6804 ASSEMBLER PAGE C-3
6804 INSTRUCTION SET
C.2.6 Load Immediate data Instruction
mvi [],#data
C.2.7 6804 Derived Instructions
asla
bam label
bap label
bxmi label
bxpl label
bymi label
bypl label
clra
clrx
clry
deca
decx
decy
inca
incx
incy
ldxi #data
ldyi #data
nop
tax
tay
txa
tya
APPENDIX D
AS6805 ASSEMBLER
D.1 6805 REGISTER SET
The following is a list of the 6805 registers used by AS6805:
a - 8-bit accumulator
x - index register
D.2 6805 INSTRUCTION SET
The following tables list all 6805 mnemonics recognized by
the AS6805 assembler. The designation [] refers to a required
addressing mode argument. The following list specifies the
format for each addressing mode supported by AS6805:
#data immediate data
byte or word data
*dir direct page addressing
(see .setdp directive)
0 <= dir <= 255
,x register indirect addressing
zero offset
offset,x register indirect addressing
0 <= offset <= 255 --- byte mode
256 <= offset <= 65535 --- word mode
(an externally defined offset uses the
word mode)
ext extended addressing
label branch label
AS6805 ASSEMBLER PAGE D-2
6805 INSTRUCTION SET
The terms data, dir, offset, and ext may all be expressions.
Note that not all addressing modes are valid with every in-
struction, refer to the 6805 technical data for valid modes.
D.2.1 Control Instructions
clc cli
nop rsp
rti rts
sec sei
stop swi
tax txa
wait
D.2.2 Bit Manipulation Instructions
brset #data,*dir,label
brclr #data,*dir,label
bset #data,*dir
bclr #data,*dir
D.2.3 Branch Instructions
bra label brn label
bhi label bls label
bcc label bcs label
bne label beq label
bhcc label bhcs label
bpl label bmi label
bmc label bms label
bil label bih label
bsr label
AS6805 ASSEMBLER PAGE D-3
6805 INSTRUCTION SET
D.2.4 Read-Modify-Write Instructions
nega negx
neg []
coma comx
com []
lsra lsrx
lsr []
rora rorx
ror []
asra asrx
asr []
lsla lslx
lsl []
rola rolx
rol []
deca decx
dec []
inca incx
inc []
tsta tstx
tst []
clra clrx
clr []
D.2.5 Register\Memory Instructions
sub [] cmp []
sbc [] cpx []
and [] bit []
lda [] sta []
eor [] adc []
ora [] add []
ldx [] stx []
AS6805 ASSEMBLER PAGE D-4
6805 INSTRUCTION SET
D.2.6 Jump and Jump to Subroutine Instructions
jmp [] jsr []
APPENDIX E
AS6809 ASSEMBLER
E.1 6809 REGISTER SET
The following is a list of the 6809 registers used by AS6809:
a,b - 8-bit accumulators
d - 16-bit accumulator <a:b>
x,y - index registers
s,u - stack pointers
pc - program counter
cc - condition code
dp - direct page
E.2 6809 INSTRUCTION SET
The following tables list all 6809 mnemonics recognized by
the AS6809 assembler. The designation [] refers to a required
addressing mode argument. The following list specifies the
format for each addressing mode supported by AS6809:
#data immediate data
byte or word data
*dir direct page addressing
(see .setdp directive)
0 <= dir <= 255
label branch label
r,r1,r2 registers
cc,a,b,d,dp,x,y,s,u,pc
,-x ,--x register indexed
autodecrement
AS6809 ASSEMBLER PAGE E-2
6809 INSTRUCTION SET
,x+ ,x++ register indexed
autoincrement
,x register indexed addressing
zero offset
offset,x register indexed addressing
-16 <= offset <= 15 --- 5-bit
-128 <= offset <= -17 --- 8-bit
16 <= offset <= 127 --- 8-bit
-32768 <= offset <= -129 --- 16-bit
128 <= offset <= 32767 --- 16-bit
(external definition of offset
uses 16-bit mode)
a,x accumulator offset indexed addressing
ext extended addressing
ext,pc pc addressing ( pc <- pc + ext )
ext,pcr pc relative addressing
[,--x] register indexed indirect
autodecrement
[,x++] register indexed indirect
autoincrement
[,x] register indexed indirect addressing
zero offset
[offset,x] register indexed indirect addressing
-128 <= offset <= 127 --- 8-bit
-32768 <= offset <= -129 --- 16-bit
128 <= offset <= 32767 --- 16-bit
(external definition of offset
uses 16-bit mode)
[a,x] accumulator offset indexed
indirect addressing
[ext] extended indirect addressing
[ext,pc] pc indirect addressing
( [pc <- pc + ext] )
[ext,pcr] pc relative indirect addressing
The terms data, dir, label, offset, and ext may all be expres-
sions.
AS6809 ASSEMBLER PAGE E-3
6809 INSTRUCTION SET
Note that not all addressing modes are valid with every in-
struction, refer to the 6809 technical data for valid modes.
E.2.1 Inherent Instructions
abx daa
mul nop
rti rts
sex swi
swi1 swi2
swi3 sync
E.2.2 Short Branch Instructions
bcc label bcs label
beq label bge label
bgt label bhi label
bhis label bhs label
ble label blo label
blos label bls label
blt label bmi label
bne label bpl label
bra label brn label
bvc label bvs label
bsr label
E.2.3 Long Branch Instructions
lbcc label lbcs label
lbeq label lbge label
lbgt label lbhi label
lbhis label lbhs label
lble label lblo label
lblos label lbls label
lblt label lbmi label
lbne label lbpl label
lbra label lbrn label
lbvc label lbvs label
lbsr label
AS6809 ASSEMBLER PAGE E-4
6809 INSTRUCTION SET
E.2.4 Single Operand Instructions
asla aslb
asl []
asra asrb
asr []
clra clrb
clr []
coma comb
com []
deca decb
dec []
inca incb
inc []
lsla lslb
lsl []
lsra lsrb
lsr []
nega negb
neg []
rola rolb
rol []
rora rorb
ror []
tsta tstb
tst []
AS6809 ASSEMBLER PAGE E-5
6809 INSTRUCTION SET
E.2.5 Double Operand Instructions
adca [] adcb []
adda [] addb []
anda [] andb []
bita [] bitb []
cmpa [] cmpb []
eora [] eorb []
lda [] ldb []
ora [] orb []
sbca [] sbcb []
sta [] stb []
suba [] subb []
E.2.6 D-register Instructions
addd [] subd []
cmpd [] ldd []
std []
E.2.7 Index/Stack Register Instructions
cmps [] cmpu []
cmpx [] cmpy []
lds [] ldu []
ldx [] ldy []
leas [] leau []
leax [] leay []
sts [] stu []
stx [] sty []
pshs r pshu r
puls r pulu r
AS6809 ASSEMBLER PAGE E-6
6809 INSTRUCTION SET
E.2.8 Jump and Jump to Subroutine Instructions
jmp [] jsr []
E.2.9 Register - Register Instructions
exg r1,r2 tfr r1,r2
E.2.10 Condition Code Register Instructions
andcc #data orcc #data
cwai #data
E.2.11 6800 Compatibility Instructions
aba cba
clc cli
clv des
dex ins
inx
ldaa [] ldab []
oraa [] orab []
psha pshb
pula pulb
sba sec
sei sev
staa [] stab []
tab tap
tba tpa
tsx txs
wai
APPENDIX F
AS6811 ASSEMBLER
F.1 6811 REGISTER SET
The following is a list of the 6811 registers used by AS6811:
a,b - 8-bit accumulators
d - 16-bit accumulator <a:b>
x,y - index registers
F.2 6811 INSTRUCTION SET
The following tables list all 6811 mnemonics recognized by
the AS6811 assembler. The designation [] refers to a required
addressing mode argument. The following list specifies the
format for each addressing mode supported by AS6811:
#data immediate data
byte or word data
*dir direct page addressing
(see .setdp directive)
0 <= dir <= 255
,x register indirect addressing
zero offset
offset,x register indirect addressing
0 <= offset <= 255
ext extended addressing
label branch label
The terms data, dir, offset, and ext may all be expressions.
AS6811 ASSEMBLER PAGE F-2
6811 INSTRUCTION SET
Note that not all addressing modes are valid with every in-
struction, refer to the 6811 technical data for valid modes.
F.2.1 Inherent Instructions
aba abx
aby cba
clc cli
clv daa
des dex
dey fdiv
idiv ins
inx iny
mul nop
rti rts
sba sec
sei sev
stop swi
tab tap
tba tpa
tsx txs
wai xgdx
xgdy
psha pshb
psh a psh b
pshx pshy
psh x psh y
pula pulb
pul a pul b
pulx puly
pul x pul y
F.2.2 Branch Instructions
bra label brn label
bhi label bls label
bcc label bhs label
bcs label blo label
bne label beq label
bvc label bvs label
bpl label bmi label
bge label blt label
bgt label ble label
bsr label
AS6811 ASSEMBLER PAGE F-3
6811 INSTRUCTION SET
F.2.3 Single Operand Instructions
asla aslb asld
asl a asl b asl d
asl []
asra asrb
asr a asr b
asr []
clra clrb
clr a clr b
clr label
coma comb
com a com b
com []
deca decb
dec a dec b
dec []
inca incb
inc a inc b
inc []
lsla lslb lsld
lsl a lsl b lsl d
lsl []
lsra lsrb lsrd
lsr a lsr b lsr d
lsr []
nega negb
neg a neg b
neg []
rola rolb
rol a rol b
rol []
rora rorb
ror a ror b
ror []
tsta tstb
tst a tst b
tst []
AS6811 ASSEMBLER PAGE F-4
6811 INSTRUCTION SET
F.2.4 Double Operand Instructions
adca [] adcb []
adc a [] adc b []
adda [] addb [] addd []
add a [] add b [] add d []
anda [] andb []
and a [] and b []
bita [] bitb []
bit a [] bit b []
cmpa [] cmpb []
cmp a [] cmp b []
eora [] eorb []
eor a [] eor b []
ldaa [] ldab []
lda a [] lda b []
oraa [] orab []
ora a [] ora b []
sbca [] sbcb []
sbc a [] sbc b []
staa [] stab []
sta a [] sta b []
suba [] subb [] subd []
sub a [] sub b [] sub d []
F.2.5 Bit Manupulation Instructions
bclr [],#data
bset [],#data
brclr [],#data,label
brset [],#data,label
AS6811 ASSEMBLER PAGE F-5
6811 INSTRUCTION SET
F.2.6 Jump and Jump to Subroutine Instructions
jmp [] jsr []
F.2.7 Long Register Instructions
cpx [] cpy []
ldd [] lds []
ldx [] ldy []
std [] sts []
stx [] sty []
APPENDIX G
AS6816 ASSEMBLER
G.1 6816 REGISTER SET
The following is a list of the 6816 registers used by AS6816:
a,b - 8-bit accumulators
d - 16-bit accumulator <a:b>
e - 16-bit accumulator
x,y,z - index registers
k - address extension register
s - stack pointer
ccr - condition code
G.2 6816 INSTRUCTION SET
The following tables list all 6816 mnemonics recognized by
the AS6816 assembler. The designation [] refers to a required
addressing mode argument. The following list specifies the
format for each addressing mode supported by AS6816:
#data immediate data
byte or word data
#xo,#yo local immediate data (mac / rmac)
label branch label
r register
ccr,a,b,d,e,x,y,z,s
,x zero offset register indexed addressing
,x8
,x16
offset,x register indexed addressing
AS6816 ASSEMBLER PAGE G-2
6816 INSTRUCTION SET
0 <= offset <= 255 --- 8-bit
-32768 <= offset <= -1 --- 16-bit
256 <= offset <= 32767 --- 16-bit
(external definition of offset
uses 16-bit mode)
offset,x8 unsigned 8-bit offset indexed addressing
offset,x16 signed 16-bit offset indexed addressing
e,x accumulator offset indexed addressing
ext extended addressing
bank 64K bank number (jmp / jsr)
The terms data, label, offset, bank, and ext may all be expres-
sions.
Note that not all addressing modes are valid with every in-
struction, refer to the 6816 technical data for valid modes.
G.2.1 Inherent Instructions
aba abx aby abz
ace aced ade adx
ady adz aex aey
aez bgnd cba daa
ediv edivs emul emuls
fdiv fmuls idiv ldhi
lpstop mul nop psha
pshb pshmac pula pulb
pulmac rtr rts sba
sde sted swi sxt
tab tap tba tbek
tbsk tbxk tbyk tbzk
tde tdmsk tdp ted
tedm tekb tem tmer
tmet tmxed tpa tpd
tskb tsx tsy tsz
txkb txs txy txz
tykb tys tyx tyz
tzkb tzs tzx tzy
wai xgab xgde xgdx
xgdy xgdz xgex xgey
xgez
AS6816 ASSEMBLER PAGE G-3
6816 INSTRUCTION SET
G.2.2 Push/Pull Multiple Register Instructions
pshm r,... pulm r,...
G.2.3 Short Branch Instructions
bcc label bcs label
beq label bge label
bgt label bhi label
bhis label bhs label
ble label blo label
blos label bls label
blt label bmi label
bne label bpl label
bra label brn label
bvc label bvs label
bsr label
G.2.4 Long Branch Instructions
lbcc label lbcs label
lbeq label lbge label
lbgt label lbhi label
lbhis label lbhs label
lble label lblo label
lblos label lbls label
lblt label lbmi label
lbne label lbpl label
lbra label lbrn label
lbvc label lbvs label
lbsr label
G.2.5 Bit Manipulation Instructions
bclr [],#data
bset [],#data
brclr [],#data,label
brset [],#data,label
AS6816 ASSEMBLER PAGE G-4
6816 INSTRUCTION SET
G.2.6 Single Operand Instructions
asla aslb asld asle
asl [] aslw [] aslm
asra asrb asrd asre
asr [] asrw [] asrm
clra clrb clrd clre
clr [] clrw [] clrm
coma comb comd come
com [] comw []
deca decb
dec [] decw []
inca incb
inc [] incw []
lsla lslb lsld lsle
lsl [] lslw [] lslm
lsra lsrb lsrd lsre
lsr [] lsrw []
nega negb negd nege
neg [] negw []
rola rolb rold role
rol [] rolw []
rora rorb rord rore
ror [] rorw []
tsta tstb tsta tste
tst [] tstw []
AS6816 ASSEMBLER PAGE G-5
6816 INSTRUCTION SET
G.2.7 Double Operand Instructions
adca [] adcb [] adcd [] adce
[]
adda [] addb [] addd [] adde
[]
anda [] andb [] andd [] ande
[]
bita [] bitb []
cmpa [] cmpb [] cpd [] cpe
[]
eora [] eorb [] eord [] eore
[]
ldaa [] ldab [] ldd [] lde
[]
oraa [] orab [] ord [] ore
[]
sbca [] sbcb [] sbcd [] sbce
[]
staa [] stab [] std [] ste
[]
suba [] subb [] subd [] sube
[]
G.2.8 Index/Stack Register Instructions
cps [] cpx []
cpy [] cpz []
lds [] ldx []
ldy [] ldz []
sts [] stx []
sty [] stz []
AS6816 ASSEMBLER PAGE G-6
6816 INSTRUCTION SET
G.2.9 Jump and Jump to Subroutine Instructions
jmp bank,[] jsr bank,[]
G.2.10 Condition Code Register Instructions
andp #data orp #data
G.2.11 Multiply and Accumulate Instructions
mac #data rmac #data
mac #xo,#yo rmac #xo,#yo
APPENDIX H
AS8085 ASSEMBLER
H.1 8085 REGISTER SET
The following is a list of the 8080/8085 registers used by
AS8085:
a,b,c,d,e,h,l - 8-bit accumulators
m - memory through (hl)
sp - stack pointer
psw - status word
H.2 8085 INSTRUCTION SET
The following tables list all 8080/8085 mnemonics recognized
by the AS8085 assembler. The following list specifies the
format for each addressing mode supported by AS8085:
#data immediate data
byte or word data
r,r1,r2 register or register pair
psw,a,b,c,d,e,h,l
bc,de,hl,sp,pc
m memory address using (hl)
addr direct memory addressing
label call or jump label
The terms data, m, addr, and label may be expressions.
Note that not all addressing modes are valid with every in-
struction, refer to the 8080/8085 technical data for valid
modes.
AS8085 ASSEMBLER PAGE H-2
8085 INSTRUCTION SET
H.2.1 Inherent Instructions
cma cmc
daa di
ei hlt
nop pchl
ral rar
ret rim
rrc rlc
sim sphl
stc xchg
xthl
H.2.2 Register/Memory/Immediate Instructions
adc r adc m aci #data
add r add m adi #data
ana r ana m ani #data
cmp r cmp m cpi #data
ora r ora m ori #data
sbb r sbb m sbi #data
sub r sub m sui #data
xra r xra m xri #data
H.2.3 Call and Return Instructions
cc label rc
cm label rm
cnc label rnc
cnz label rnz
cp label rp
cpe label rpe
cpo label rpo
cz label rz
call label
H.2.4 Jump Instructions
jc label
jm label
jnc label
jnz label
jp label
jpe label
jpo label
jz label
jmp label
AS8085 ASSEMBLER PAGE H-3
8085 INSTRUCTION SET
H.2.5 Input/Output/Reset Instructions
in data
out data
rst data
H.2.6 Move Instructions
mov r1,r2
mov r,m
mov m,r
mvi r,#data
mvi m,#data
H.2.7 Other Instructions
dcr r dcr m
inr r inr m
dad r dcx r
inx r ldax r
pop r push r
stax r
lda addr lhld addr
shld addr sta addr
lxi r,#data
APPENDIX I
ASZ80 ASSEMBLER
I.1 .hd64 DIRECTIVE
Format:
.hd64
The .hd64 directive enables processing of the HD64180 specific
mnemonics not included in the Z80 instruction set. HD64180
mnemonics encountered without the .hd64 directive will be
flagged with an 'o' error.
I.2 Z80 REGISTER SET AND CONDITIONS
The following is a complete list of register designations and
condition mnemonics:
byte registers - a,b,c,d,e,h,l,i,r
register pairs - af,af',bc,de,hl
word registers - pc,sp,ix,iy
C - carry bit set
M - sign bit set
NC - carry bit clear
NZ - zero bit clear
P - sign bit clear
PE - parity even
PO - parity odd
Z - zero bit set
ASZ80 ASSEMBLER PAGE I-2
Z80 INSTRUCTION SET
I.3 Z80 INSTRUCTION SET
The following tables list all Z80/HD64180 mnemonics recog-
nized by the ASZ80 assembler. The designation [] refers to a
required addressing mode argument. The following list specifies
the format for each addressing mode supported by ASZ80:
#data immediate data
byte or word data
n byte value
rg a byte register
a,b,c,d,e,h,l
rp a register pair
bc,de,hl
(hl) implied addressing or
register indirect addressing
(label) direct addressing
offset(ix) indexed addressing with
an offset
label call/jmp/jr label
The terms data, dir, offset, and ext may all be expressions.
The terms dir and offset are not allowed to be external refer-
ences.
Note that not all addressing modes are valid with every in-
struction, refer to the Z80/HD64180 technical data for valid
modes.
ASZ80 ASSEMBLER PAGE I-3
Z80 INSTRUCTION SET
I.3.1 Inherent Instructions
ccf cpd
cpdr cpi
cpir cpl
daa di
ei exx
halt neg
nop reti
retn rla
rlca rld
rra rrca
rrd scf
I.3.2 Implicit Operand Instructions
adc a,[] adc []
add a,[] add []
and a,[] and []
cp a,[] cp []
dec a,[] dec []
inc a,[] inc []
or a,[] or []
rl a,[] rl []
rlc a,[] rlc []
rr a,[] rr []
rrc a,[] rrc []
sbc a,[] sbc []
sla a,[] sla []
sra a,[] sra []
srl a,[] srl []
sub a,[] sub []
xor a,[] xor []
ASZ80 ASSEMBLER PAGE I-4
Z80 INSTRUCTION SET
I.3.3 Load Instruction
ld rg,[] ld [],rg
ld (bc),a ld a,(bc)
ld (de),a ld a,(de)
ld (label),a ld a,(label)
ld (label),rp ld rp,(label)
ld i,a ld r,a
ld a,i ld a,r
ld sp,hl ld sp,ix
ld sp,iy ld rp,#data
ldd lddr
ldi ldir
I.3.4 Call/Return Instructions
call C,label ret C
call M,label ret M
call NC,label ret NC
call NZ,label ret NZ
call P,label ret P
call PE,label ret PE
call PO,label ret PO
call Z,label ret Z
call label ret
I.3.5 Jump and Jump to Subroutine Instructions
jp C,label jp M,label
jp NC,label jp NZ,label
jp P,label jp PE,label
jp PO,label jp Z,label
jp (hl) jp (ix)
jp (iy) jp label
djnz label
jr C,label jr NC,label
jr NZ,label jr Z,label
jr label
ASZ80 ASSEMBLER PAGE I-5
Z80 INSTRUCTION SET
I.3.6 Bit Manipulation Instructions
bit n,[]
res n,[]
set n,[]
I.3.7 Interrupt Mode and Reset Instructions
im n
im n
im n
rst n
I.3.8 Input and Output Instructions
in a,(n) in rg,(c)
ind indr
ini inir
out (n),a out (c),rg
outd otdr
outi otir
I.3.9 Register Pair Instructions
add hl,rp add ix,rp
add iy,rp
adc hl,rp sbc hl,rp
ex (sp),hl ex (sp),ix
ex (sp),iy
ex de,hl
ex af,af'
push rp pop rp
ASZ80 ASSEMBLER PAGE I-6
Z80 INSTRUCTION SET
I.3.10 HD64180 Specific Instructions
in0 rg,(n)
out0 (n),rg
otdm otdmr
otim otimr
mlt bc mlt de
mlt hl mlt sp
slp
tst a
tstio #data
