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Magazyn Enter 1999 January
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enter_01_1999_2.iso
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BIOS
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ctchip34
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ETEQ.CFG
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1994-06-09
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9KB
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375 lines
;**************************************************************
ETEQ Micro
;**************************************************************
INDEX=10 ;Clock Control
;**************************************************************
BIT=76 ;XX=Reserved
BIT=5 ;Refresh Selection
0=AT Type Refresh
1=Concurrent Refresh
BIT=4 ;Extended IO Decode Enable
0/1 Extended IO Decode
BIT=3 ;X=Reserved
BIT=2 ;X=Reserved
BIT=10 ;AT Bus Clock Select
00=ATCLK=CLK/6
01=ATCLK=CLK/4
10=Reserved
11=ATCLK=CLK/2
;**************************************************************
INDEX=11 ;CACHE and DRAM Interleave Configuration
;**************************************************************
BIT=7 ;X=Reserved. Must be 0 for proper operation.
BIT=6 ;Should be "1" when External CACHE gets enabled.
BIT=5 ;X=Reserved
BIT=4 ;X=Reserved
BIT=3 ;0=Remapped 256K is non-cacheable
1=Remapped 256K is cacheable (See Reg 15H)
BIT=2 ;0=Normal Operation
1=Enable direct SRAM access. ???
BIT=1 ;0/1 External Cache
BIT=0 ;0=Set valid# output to 1 to flush cache
1=Set valid# output to 0.
;**************************************************************
INDEX=12 ;???
;**************************************************************
BIT=7 ;X=Reserved
BIT=6 ;Access ROM/RAM at F0000H-FFFFFH (System BIOS ROM)
0=Read from ROM, Write to RAM
1=Read from Shadow RAM, Write will be protected (will not
be written into RAM)
BIT=5 ;Access ROM/RAM at E0000H-EFFFFH.
0=Accessed on-board ROM.
1=Access Shadow RAM enabled in 16K blocks. ???
BIT=4 ;RAM at E0000H-EFFFFH
0=Read/Write
1=Read Only
BIT=3 ;Access ROM/RAM at D0000H-DFFFFH.
0=Accessed on-board ROM
1=Access Shadow RAM enabled in 16K blocks. ???
BIT=2 ;RAM at D0000H-DFFFFH.
0=Read/Write
1=Read Only
BIT=1 ;Access ROM/RAM at C0000H-CFFFFH
0=Accessed on-board ROM
1=Access Shadow RAM enabled in 16K blocks. ???
BIT=0 ;RAM at C0000H-CFFFFH
0=Read/Write
1=Read Only
;**************************************************************
INDEX=13 ;Shadow RAM 16K Map (Block C, D)
;**************************************************************
BIT=7 ;RAM at DC000H-DFFFFH
0=Disabled. Access to this area will be passed to the AT
Bus.
1=Enable access to this area RAM.
BIT=6 ;RAM at D8000H-DBFFFH
0=Disabled. Access to this area will be passed to the AT
Bus.
1=Enable access to this area RAM.
BIT=5 ;RAM at D4000H-D7FFFH
0=Disabled. Access to this area will be passed to the AT
Bus.
1=Enable access to this area RAM.
BIT=4 ;RAM at D0000H-D3FFFH
0=Disabled. Access to this area will be passed to the AT
Bus.
1=Enable access to this area RAM.
BIT=3 ;RAM at CC000H-CFFFFH
0=Disabled. Access to this area will be passed to the AT
Bus.
1=Enable access to this area RAM.
BIT=2 ;RAM at C8000H-CBFFFH
0=Disabled. Access to this area will be passed to the AT
Bus.
1=Enable access to this area RAM.
BIT=1 ;RAM at C4000H-C7FFFH
0=Disabled. Access to this area will be passed to the AT
Bus.
1=Enable access to this area RAM.
BIT=0 ;RAM at C0000H-C3FFFH
0=Disabled. Access to this area will be passed to the AT
Bus.
1=Enable access to this area RAM.
;**************************************************************
INDEX=14 ;Shadow RAM 16K Map (Block E)
;**************************************************************
BIT=7 ;Must be "1" to work.
BIT=6 ;X=Reserved.
BIT=54 ;XX=Version Number. (0,0) for current Vers.
BIT=3 ;RAM at EC000H-EFFFFH
0=Disabled. Access to this area will be passed to the AT
Bus.
1=Enable access to this area RAM.
BIT=2 ;RAM at E8000H-EBFFFH
0=Disabled. Access to this area will be passed to the AT
Bus.
1=Enable access to this area RAM.
BIT=1 ;RAM at E4000H-E7FFFH
0=Disabled. Access to this area will be passed to the AT
Bus.
1=Enable access to this area RAM.
BIT=0 ;RAM at E0000H-E3FFFH
0=Disabled. Access to this area will be passed to the AT
Bus.
1=Enable access to this area RAM.
;**************************************************************
INDEX=15 ;256KB Remap Location
;**************************************************************
???
BIT=7 ;X=Reserved
BIT=6 ;Fast Gate A20
0/1
BIT=5 ;0/1 Remap
BIT=43210 ;00001=1MB
00010=2MB
00011=3MB
00100=4MB
00101=5MB
00110=6MB
00111=7MB
01000=8MB
01001=9MB
01010=10MB
01011=11MB
01100=12MB
01101=13MB
01110=14MB
01111=15MB
10000=16MB
;**************************************************************
INDEX=16 ;DRAM Bank Configuration
;**************************************************************
BIT=76 ;Bank3 DRAM Type
00=None
01=256K
10=1M
11=4M
BIT=54 ;Bank2 DRAM Type
00=None
01=256K
10=1M
11=4M
BIT=32 ;Bank1 DRAM Type
00=None
01=256K
10=1M
11=4M
BIT=10 ;Bank0 DRAM Type
00=None
01=256K
10=1M
11=4M
;**************************************************************
INDEX=17 ;DRAM Configuration
;**************************************************************
BIT=7 ;X=Reserved
BIT=6 ;Enable Page Mode
0/1 Page Mode
BIT=5 ;X=Reserved
BIT=432 ;Read Cycle Wait States
000=0WT
001=1WT
010=2WT
011=3WT
100=4WT
101=Reserved
110=Reserved
111=Reserved
BIT=10 ;Write Cycle Wait States
00=0WT
01=1WT
10=2WT
11=Reserved
;**************************************************************
INDEX=18 ;SRAM/DRAM Configuration
;**************************************************************
BIT=76543210 ;XXXXXXXX=Reserved for 386
;**************************************************************
INDEX=19 ;Fast Reset Control
;**************************************************************
BIT=765432 ;XXXXXX=Reserved
BIT=1 ;Fast Reset.??? Control
0=A fast Reset will activate a RESET2 immediately.
1=A fast Reset will activate a RESET2 only after a HALT
instruction has been detected.
BIT=0 ;Fast CPU Reset.
0/1 Keyboard Reset Emulation
;**************************************************************
???
;**************************************************************
INDEX=20 ;Non-Cacheable Block 0 Address Register
;**************************************************************
BIT=76543210 ;XXXXXXXX=Non-Cacheable Address A25 to A18.
;**************************************************************
INDEX=21 ;Non-Cacheable Block 0 Address/Size Register
;**************************************************************
BIT=7654 ;???
0000=Disabled
0001=16KB
0010=32KB
0011=64KB
0100=256KB
0110=512KB
0111=1MB
1000=2MB
1001=4MB
1010=8MB
1011=16MB
1100=32MB
1101=64MB
BIT=3210 ;XXXX=Non-Cacheable Address A17 to A14
;**************************************************************
INDEX=22 ;Non-Cacheable Block 1 Address Register
;**************************************************************
BIT=76543210 ;XXXXXXXX=Non-Cacheable Address A25 to A18
;**************************************************************
INDEX=23 ;???Non-Cacheable Block 1 Address Register
;**************************************************************
BIT=7654 ;???
0000=Disabled
0001=16KB
0010=32KB
0011=64KB
0100=256KB
0110=512KB
0111=1MB
1000=2MB
1001=4MB
1010=8MB
1011=16MB
1100=32MB
1101=64MB
BIT=3210 ;Non-Cacheable Address A25 to A18
;**************************************************************
INDEX=24 ;Non-Cacheable Block 2 Address Register
;**************************************************************
BIT=76543210 ;XXXXXXXX=Non-Cacheable Address A25 to A18
;**************************************************************
INDEX=25 ;Non-Cacheable Block 2 Address/Size Register
;**************************************************************
BIT=7654 ;???
0000=Disabled
0001=16KB
0010=32KB
0011=64KB
0100=256KB
0110=512KB
0111=1MB
1000=2MB
1001=4MB
1010=8MB
1011=16MB
1100=32MB
1101=64MB
BIT=3210 ;Non-Cacheable Address A17 to A14
;**************************************************************
INDEX=26 ;Non-Cacheable Block 3 Address Register
;**************************************************************
BIT=76543210 ;XXXXXXXX=Non-Cacheable Address A25 to A18
;**************************************************************
INDEX=27 ;Non-Cacheable Block 3 Address/Size Register
;**************************************************************
BIT=7654 ;???
0000=Disabled
0001=16KB
0010=32KB
0011=64KB
0100=256KB
0110=512KB
0111=1MB
1000=2MB
1001=4MB
1010=8MB
1011=16MB
1100=32MB
1101=64MB
BIT=3210 ;NON-Cacheable Address A17 to A14
;**************************************************************