High Voltage Shareware/high1.zip/high1/DIR9/RGBPLD.ZIP/RGBPLD.DOC

Text File | 1993-03-26 | 9KB | 162 lines

A LOW COST PLD PROGRAMMER

This programmer can program the GAL16V8A, GAL16V8B, GAL20V8A and
GAL20V8B from Lattice, SGS and National Semiconductor.  This may seem
limited but it is not because the 16V8 directly replaces the 16R6, 16R6,
16R4, 16RP8, 16RP6, 16RP4, 16L8, 16H8, 16P8, 10L8, 12L6, 14L4, 16L2,
10H8, 12H6, 14H4, 16H2, 10P8, 12P6, 14P4 and 16P2 PALs.  The 20V8
directly replaces the 20R6, 20R6, 20R4, 20RP8, 20RP6, 20RP4, 20L8, 20H8,
20P8, 14L8, 16L6, 18L4, 20L2, 14H8, 16H6, 18H4, 20H2, 14P8, 16P6, 18P4
and 20P2 PALs.  GALs can handle logic that can not be handled by the
standard PALs. GALs unlike standard PALs can be reprogrammed in seconds
making them idea for the developer. You can build this programmer for
only $150.00 far below the $500 - $10,000 that a universal programmer
typically costs.

DESIGN AND THEORY OF OPERATION

The programmer is made up of two separate modules, an interface board
that resides in a slot in your PC and a main programmer module external
to the PC.  They are connected by a 50 pin ribbon cable.  The same
interface board is also used with a lost cost logic analyzer.  By
keeping things modular you only need to use one PC slot and can connect
either the PLD unit or logic analyzer unit to the interface card as
needed.

The interface board is a very standard two chip parallel interface.  The
8255 has three 8 bit parallel ports that can be configured by software.
This provides for a flexible interface.  In normal operation of the
programmer port A and port B will be configure to be output ports and
port C is configured with bit 0 to 3 as outputs and bits 4 to 7 as
inputs.  The second chip is a 74LS682 8 bit comparator.  It is used as
an address decoder for the 8255.  The 74LS682 asserts pin 19 low when
it's P inputs are the same as it's Q inputs.  The eight Q inputs have an
internal 10 K pull up resistor so they will stay high unless forced low.
The 8255 address is selected with the DIP switch, each switch that is
turned on will pull the corresponding Q input low.  When the address on
the PC bus (the P inputs) matches the address selected by the DIP switch
(Q inputs) a chip select is generated for the 8255.  If it is an I/O
cycle then either IOR* or IOW* will also be asserted and data will be
read from or written to the 8255 register selected by A0 and A1.  The
8255 base address is specified to the software in the configuration
file.

50 pin connector P1 is the bridge to the main programmer board.  Each of
the three 8 bit ports from the 8255 are connected to P1.  Of the
remaining 26 lines, 12 are connected to PC ground, 12 to PC +5 volts
supply, 1 to the PC +12 volts and one to -12 volts.  The +/- 12 volt
supplies are not used by the programmer but are available for other
projects.

GALs are TTL level devices, during programming however, they need a
super voltage of either 12.0, 14.5 or 16.5 volts on pin 2 of the GAL.
U2 in combination with C1, C2, D1 and D2 form a voltage doubler circuit
that takes the 12 Volts from the interface and converts it into about
22.6 Volts (12 Volts doubled to 24 Volts minus the two diode voltage
drops).  The 22.6 Volt output is feed into adjustable voltage regulator
U1.  The output voltage of U1 is control by the resistance between pin1
and ground.  The maximum output voltage of U1 is adjusted with R8 to be
16.5 Volts.  The output voltage can be lowered one step by bring signal
VSEL0 high, this turns T2 on and places resistors R6 and R5 in parallel
with R8 and R9, this lowers the resistance between U1 pin1 and ground,
lowering the output voltage.  R5 is adjusted so that the output voltage
is 14.5 Volts.  An additional output voltage is obtained by setting
VSEL1 high to turn on T1.  R4 is adjusted to produce an output of 12.0
Volts.

The super voltage can be enabled to either pin 2 or pin 4 of the ZIF
socket.  (When a 20 pin 16V8 is placed in the socket is is positioned in
the lower portion of the socket so that pin 2 of the chip actually sits
in pin 4 of the socket.) Transistor pairs T3 and T4 form a switch that
enables the super voltage to appear on pin 2 of the ZIF when the signal
into the base of of T3 is high. T5 and T6 form a similiar switch for pin
4 of the ZIF.

The +5 Volt power to the chip being programmed in the ZIF is switched by
the signals VCC22* and VCC24* from U3. U3 also turns on the LED when
either VCC22* or VCC24* are active.

Data is read in from the chip being programmed through either PS14
(16V8) or PS15 (20V8). The GAL output is open drain during programming
so it is pulled up through either R10 or R11 as appropriate. The input
signal appears at the interface on PC7.

The remaining pins are driven by U4 and U5.  These are 8 bit addressable
latches.  The bit address is placed on A0, A1 and A2 (pins 5,6 and 7).
The data to be latched is put on pin 3.  When pin 4 is high the data
from pin 3 is placed on the addressed output pin (if a0=0, a1=0 and a2=0
and data=1 then q0=1).  When pin 4 is brought back low the data is
latched.

BUILDING THE PROGRAMMER

Before building the programmer get a copy of the software from one
of the sources in the parts list.  You will need the software for
testing the programmer.

The interface board is best built on a purchased PC board (see parts
list for details).  If you elect to hand wire on a PC/XT prototype board
use a heavy gauge wire for the +5 volt and ground connections from the
PC bus to P1.

The programmer board is best built on a purchased PC board (see parts
list for details). If you wish to mount the PCB in a case make sure to
solder the LED so that it is higher then the ZIF socket, that way it can
be seen through a hole in the case. You can use sockets for all the ICs
if desired. No other special procedures are needed.

The interface board should be tested before hooking up the programmer
board, it will be easier to locate and fix interface problems isolated
from the main board.  Before plugging the interface into the PC
carefully check for shorts and other errors.  Set the I/O address using
the DIP switch.  I've found that 390H is usually free, this corresponds
to A9-OFF, A8-OFF, A7-OFF, A6-ON, A5-ON, A4-OFF, A3-ON (remember ON
corresponds to a low because it grounds the input).  Once set plug in
the board and power up the PC, if it does not boot up normally, power
down and recheck everything.  The configuration file RGBPLD.CFG should
be edited to match the logic programmer.  RGBLOGIC.CFG is a two line
ASCII text file, the first line contains the base I/O address in hex
(i.e.  390), the second line should always have 1.  Any characters after
the numeric value on each line are ignored.  Edit the file to match your
configuration.  Check the voltages at the end of the 50 conductor ribbon
cable for proper power and ground supplys.  Start up the interface test
program RGBINT.  The interface test allows you to read and write the
8255 registers.  Write an 80 (all values are expressed in hex) to the
CNTRL register, this will program ports A, B and C as output ports.
Check each bit of the three ports at the end of the cable.  You can
write different values to the ports from the diagnostic program.  If the
interface doesn't respond at all make sure the configuration file and
DIP switch settings match, if they do then check the interface board for
errors.  If everything is working, power down.

Double check the programmer board for shorts or other errors.  Connect the
50 conductor ribbon cable to the programmer board and power up the PC.  If
the PC does not boot up normally the power supply is probably shorted -
power down and correct the problem. If everything powers up fine, then run the
program RGBSETUP. Run through each of the tests in the menu. F1 will
allow you the adjust the super voltages. If the the voltages are not
present check the section of the board with U1, U2, T1, T2, T3, T4, T5
and T6. F2 and F3 allow you to check the power to the ZIF socket. F4
checks the pullup resistors and the ability to read data from ZIF pins
14 and 15. F5 will allow you to check the functioning of each active pin
on the ZIF socket - be sure all pins can be set high or low.

To use the programmer start the program RGBPLD.  Before placing a chip
in the ZIF socket select the device type using F1 (not having the
correcting device selected could burn out the chip).  The remaining menu
selections should be self explainatory - they allow you to read/write
JEDEC files and load, program and verify GAL devices.  The User
Electronic Signature (UES) for both the main and verify buffer is
displayed in ASCII format.

WRAPPING UP

That covers the details of a low cost logic programmer.  National
Semiconductor offers a free Logic Compiler called OPAL Jr. Get a copy
and you can start to design your circuits with programmable logic.

RESOURCES

National Semiconductor (OPAL Jr.) - [phone]