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  1. PAL20R4                                         PAL DESIGN SPECIFICATION
  2. P7090                                             COLI/VOLPIGNO 10/13/82
  3. 15-INPUT REGISTERED PRIORITY ENCODER
  4. MMI SUNNYVALE,CALIFORNIA
  5. CLK I0  I1  I2   I3 I4 I5 I6 I7  I8  I9  GND
  6. /OC I10 I11 FLAG Q3 Q2 Q1 Q0 I12 I13 I14 VCC
  7.  
  8. ; equations go here
  9.  
  10. /Q0 := /I0* I1
  11.      + /I0*/I1*/I2* I3
  12.      + /I0*/I1*/I2*/I3*/I4* I5
  13.      + /I0*/I1*/I2*/I3*/I4*/I5*/I6* I7
  14.      + /I0*/I1*/I2*/I3*/I4*/I5*/I6*/I7*/I8* I9
  15.      + /I0*/I1*/I2*/I3*/I4*/I5*/I6*/I7*/I8*/I9*/I10* I11
  16.      + /I0*/I1*/I2*/I3*/I4*/I5*/I6*/I7*/I8*/I9*/I10*/I11*/I12* I13
  17.      + /I0*/I1*/I2*/I3*/I4*/I5*/I6*/I7*/I8*/I9*/I10*/I11*/I12*/I13*/I14
  18.  
  19. /Q1 := /I0*/I1* I2
  20.      + /I0*/I1*/I2* I3
  21.      + /I0*/I1*/I2*/I3*/I4*/I5* I6
  22.      + /I0*/I1*/I2*/I3*/I4*/I5*/I6* I7
  23.      + /I0*/I1*/I2*/I3*/I4*/I5*/I6*/I7*/I8*/I9* I10
  24.      + /I0*/I1*/I2*/I3*/I4*/I5*/I6*/I7*/I8*/I9*/I10* I11
  25.      + /I0*/I1*/I2*/I3*/I4*/I5*/I6*/I7*/I8*/I9*/I10*/I11*/I12*/I13* I14
  26.      + /I0*/I1*/I2*/I3*/I4*/I5*/I6*/I7*/I8*/I9*/I10*/I11*/I12*/I13*/I14
  27.  
  28. /Q2 := /I0*/I1*/I2*/I3* I4
  29.      + /I0*/I1*/I2*/I3*/I4* I5
  30.      + /I0*/I1*/I2*/I3*/I4*/I5* I6
  31.      + /I0*/I1*/I2*/I3*/I4*/I5*/I6* I7
  32.      + /I0*/I1*/I2*/I3*/I4*/I5*/I6*/I7*/I8*/I9*/I10*/I11* I12
  33.      + /I0*/I1*/I2*/I3*/I4*/I5*/I6*/I7*/I8*/I9*/I10*/I11*/I12* I13
  34.      + /I0*/I1*/I2*/I3*/I4*/I5*/I6*/I7*/I8*/I9*/I10*/I11*/I12*/I13* I14
  35.      + /I0*/I1*/I2*/I3*/I4*/I5*/I6*/I7*/I8*/I9*/I10*/I11*/I12*/I13*/I14
  36.  
  37. /Q3 := /I0*/I1*/I2*/I3*/I4*/I5*/I6*/I7* I8
  38.      + /I0*/I1*/I2*/I3*/I4*/I5*/I6*/I7*/I8* I9
  39.      + /I0*/I1*/I2*/I3*/I4*/I5*/I6*/I7*/I8*/I9* I10
  40.      + /I0*/I1*/I2*/I3*/I4*/I5*/I6*/I7*/I8*/I9*/I10* I11
  41.      + /I0*/I1*/I2*/I3*/I4*/I5*/I6*/I7*/I8*/I9*/I10*/I11* I12
  42.      + /I0*/I1*/I2*/I3*/I4*/I5*/I6*/I7*/I8*/I9*/I10*/I11*/I12* I13
  43.      + /I0*/I1*/I2*/I3*/I4*/I5*/I6*/I7*/I8*/I9*/I10*/I11*/I12*/I13* I14
  44.      + /I0*/I1*/I2*/I3*/I4*/I5*/I6*/I7*/I8*/I9*/I10*/I11*/I12*/I13*/I14
  45.  
  46. /FLAG = /I0*/I1*/I2*/I3*/I4*/I5*/I6*/I7*/I8*/I9*/I10*/I11*/I12*/I13*/I14
  47.  
  48. FUNCTION TABLE
  49.  
  50. CLK /OC I14 I13 I12 I11 I10 I9 I8 I7 I6 I5 I4 I3 I2 I1 I0 Q3 Q2 Q1 Q0 FLAG
  51.  
  52. ; CHIP    FIFTEEN INPUTS    --OUTPUTS--
  53. ;CONTROL  11111             QQQQ
  54. ;CLK /OC  432109876543210   3210   FLAG   COMMENTS
  55. ------------------------------------------------------------------------
  56.   C   L   XXXXXXXXXXXXXXH   HHHH    H      I0 INTERRUPT HIGHEST PRIORITY
  57.   C   L   XXXXXXXXXXXXXHL   HHHL    H      I1 INTERRUPT 
  58.   C   L   XXXXXXXXXXXXHLL   HHLH    H      I2 INTERRUPT 
  59.   C   L   XXXXXXXXXXXHLLL   HHLL    H      I3 INTERRUPT 
  60.   C   L   XXXXXXXXXXHLLLL   HLHH    H      I4 INTERRUPT 
  61.   C   L   XXXXXXXXXHLLLLL   HLHL    H      I5 INTERRUPT 
  62.   C   L   XXXXXXXXHLLLLLL   HLLH    H      I6 INTERRUPT 
  63.   C   L   XXXXXXXHLLLLLLL   HLLL    H      I7 INTERRUPT 
  64.   C   L   XXXXXXHLLLLLLLL   LHHH    H      I8 INTERRUPT 
  65.   C   L   XXXXXHLLLLLLLLL   LHHL    H      I9 INTERRUPT 
  66.   C   L   XXXXHLLLLLLLLLL   LHLH    H      I10 INTERRUPT 
  67.   C   L   XXXHLLLLLLLLLLL   LHLL    H      I11 INTERRUPT 
  68.   C   L   XXHLLLLLLLLLLLL   LLHH    H      I12 INTERRUPT 
  69.   C   L   XHLLLLLLLLLLLLL   LLHL    H      I13 INTERRUPT 
  70.   C   L   HLLLLLLLLLLLLLL   LLLH    H      I14 INTERRUPT LOWEST PRIORITY
  71.   C   L   LLLLLLLLLLLLLLL   LLLL    L      NO INTERRUPT
  72.   X   H   XXXXXXXXXXXXXXX   ZZZZ    X      TEST HI-Z
  73. ------------------------------------------------------------------------
  74.  
  75. DESCRIPTION
  76. The 15-input registered priority encoder accepts 15 active low inputs
  77. (I0-I14) to load the binary weighted code of the priority order into
  78. the output registers (Q3-Q0) on the rising edge of the clock (CLK).
  79.