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1990-01-26
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98 lines
(c) Copyright 1989 Commodore-Amiga, Inc. All rights reserved.
The information contained herein is subject to change without notice, and
is provided "as is" without warranty of any kind, either expressed or implied.
The entire risk as to the use of this information is assumed by the user.
Exception Vector Warning
by Bryce Nesbitt
If you are currently writing values directly to the exception table
in low memory there are two things you need to know:
1> This is not a supported operation. Nothing protects you
from any other tasks that might be in the system.
2> The exception table may move in future versions of the Amiga
that have a 68020 or other members of the 68000 processor
family. Take steps NOW to be sure your program will continue
working with future versions of the operating system.
Only a very few programs will be affected. Debuggers may need to take
over the exceptions to get the control they need. Take-over-the-machine
games may have bypassed the operating system completely. Both types
of programs need to be aware that the exception base can move.
Under the current system, the 68000's exception vectors start at a fixed
location, $00000000. This means that any interrupt or exception must first
read an address from CHIP ram. Depending on display modes and blitter
activity, this can impose a significant speed penalty. Tentative plans
have been made to change this for V1.4 Kickstart. This article is advance
warning for developers.
Starting with the 68010, all new members of the 68000 family have supported
the "Vector Base Register", or VBR. This sets the absolute hardware address
used by the chip for the exception table. With VBR we can locate the
table into the fastest memory currently installed in the system.
Serial port and graphic interrupt users will see the most dramatic speed
increases.
;------------------------------------------------------------------------
; The assumption that the exception table is located at $00000000 is
; invalid. This ready-to-use function will extract the proper pointer
; and return it in d0.
;
; Remember that writing directly to the exception table is not supported.
; Where possible you should be using the exception handling defined
; by Exec.
;
INCLUDE "exec/execbase.i"
INCLUDE "exec/libraries.i"
ABSEXECBASE EQU 4
XDEF _GetVBR ;Make this externally visible
XREF _LVOSupervisor
_GetVBR: movem.l a5/a6,-(sp)
move.l ABSEXECBASE,a6
moveq #0,d0
;
; Check the CPU type. AFB_68010 indicates a 68010 CPU or better
;
btst.b #AFB_68010,AttnFlags+1(a6) ;Check CPU type
beq.s no_vbr ;CPU has no VBR register...
; We have the right CPU. Find out where the exception
; table REALLY is.
lea.l GetVBRTrap(pc),a5
jsr _LVOSupervisor(a6)
no_vbr:
movem.l (sp)+,a5/a6
rts
;
; The Supervisor() function takes the address of a small supervisor mode
; function in A5, and traps to it at the Supervisor level of privilege.
; All registers are returned from the Supervisor function.
;
; Here we read the Vector Base Register. The instruction is
; "MOVEC.L VBR,D0", but is included as a dc.w for assemblers that can't
; understand 68010 instructions.
;
GetVBRTrap:
dc.w $4e7a,$0801 ;MOVEC.L VBR,D0
rte
END