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  1.  
  2.                      Last update:  02/09/86
  3.                            HD64180.BUG
  4.                               V 1.0
  5.  
  6.  
  7. I believe the following section was written by:
  8.  
  9.                              WA7GXD
  10.  
  11.            (See Gateway Vol 2, No 11.  Jan. 24, 1986)
  12.  
  13.  
  14.      Iµá yo⌡á arσ planninτ oε usinτ ß HitachΘ HD6418░ (gues≤á yo⌡ ì
  15. havσ t∩ usσ HitachΘ iµ yo⌡ plaε oε usinτ ß 64180...⌐ pleasσá notσ ì
  16. tha⌠ i⌠ i≤ no⌠ directl∙ compatiblσ witΦ Z8░ (tm⌐ stylσ periphera∞ ì
  17. IC≤ wheε usinτ thσ Modσ ▓ interrup⌠ scheme«á  ╔ know╗ ╔ founΣ ou⌠ ì
  18. thσ hard¼ expensivσ way.
  19.  
  20.      ╔á havσá designeΣ ß packe⌠ switcΦ fo≥ Amateu≥á packe⌠á radi∩ ì
  21. usagσ tha⌠ i≤ baseΣ oε thσ 64180¼ ß PIO¼ ß pai≥ oµ SIO/2≤ anΣ thσ ì
  22. NCR538░ SCS╔ chip«á I⌠ als∩ ha≤ 1╢ bytewidσ socket≤ anΣ screw≤ oε ì
  23. thσá sidσ oµ ß 5.25ó flopp∙ disδ controller«á  I⌠ i≤ oε ß 4-laye≥ ì
  24. boarΣá anΣ wσ haΣ prototypσ board≤ madσ (compileΣ i≤ thσá neares⌠ ì
  25. softwarσá equivalent...)«á  Durinτ fina∞ hardwarσ debuτá testing¼ ì
  26. modσ ▓ interrupt≤ werσ switcheΣ on.
  27.  
  28.      Thσ periphera∞ woulΣ servicσ exactl∙ ▒ interrupt¼á theε locδ ì
  29. it≤ IE╧ linσ lo≈ anΣ sta∙ tha⌠ wa∙ unti∞ powe≥ off/powe≥ oε rese⌠ ì
  30. wa≤ accomplished!
  31.  
  32.      I⌠á turn≤á ou⌠ tha⌠ thσ timinτ oµ thσ LIR¬ outpu⌠á froφá thσ ì
  33. 6418░á need≤ t∩ bσ delayeΣ (undocumenteΣ requiremen⌠ oµá thσá Z8░ ì
  34. (tm⌐á peripherals!)«á HitachΘ ha≤ ß simplσ circui⌠ t∩á accomplisΦ ì
  35. thi≤á iµá yo⌡á happeεá t∩ havσ thσ sparσ fli≡ flo≡á anΣá O╥á gatσ ì
  36. floatinτá arounΣ oε you≥ board«á  ╔ didn'⌠ anΣ simpl∙á redesigneΣ ì
  37. thσ wait-statσ generato≥ t∩ accomplisΦ thσ samσ thing.
  38.  
  39.      No≈ Modσ ▓ work≤ jus⌠ fine.
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  54.   
  55. è 
  56.   
  57.                   The following section is by:
  58.  
  59.                              KA8BMT
  60.  
  61.                            Reference:
  62.   
  63. HitachΘá HD6418░ 8-Bi⌠ HigΦ Integratioε CMO╙ Microprocesso≥á Datß ì
  64. Booδ  [January¼ 198╡ #U77]
  65.  
  66.                   PG 27: I/O ADDRESSING NOTES:
  67.  
  68.      "Thσá on-chi≡ I/╧ registe≥ addresse≤ arσ locateΣ iε thσá I/╧ ì
  69. addres≤á spacσ froφ 0000╚ t∩ 00FF╚ (16-bi⌠ I/╧á addresses).óá  [┴ ì
  70. notσá unde≥ figurσ 2.2.╡ oε pagσ 15║á 'NOTE║á A16-A1╕ ╜ ░ fo≥ I/╧ ì
  71. cycles'.▌ "Thus¼á t∩ acces≤ thσ on-chi≡ I/╧ register≤ (usinτá I/╧ ì
  72. instructions),"
  73.  
  74.  
  75.      [I≤ therσ somσ othe≥ wa∙ t∩ acces≤ thesσ registers¼á beside≤ ì
  76. I/╧ instructions┐  IOE¬ anΣ ME¬ woulΣ determinσ whethe≥ i⌠ i≤ I/╧ ì
  77. o≥á MEmory¼á s∩ wha⌠ doe≤ thσ las⌠ par⌠ oµ thσ previou≤ paragrapΦ ì
  78. mean?]
  79.  
  80. "thσ high-orde≥ ╕ bit≤ oµ thσ 16-bi⌠ I/╧ addres≤ mus⌠ bσ 0."
  81.  
  82.      "Thσá conventiona∞ I/╧ instruction≤ (OU╘ (m),┴ » I╬ A,(m⌐á » ì
  83. OUT╔ » IN╔ » etc.⌐ Placσ thσ content≤ oµ ß CP╒ register,"
  84.  
  85.      [Thσ "Bó register¼á thi≤ i≤ becausσ oµ thσ wa∙ thσ Z-8░ (tm⌐ ì
  86. handle≤á thσ "I╬ g,(C)ó anΣ thσ "OU╘ (C),góá instructions«á  Thi≤ ì
  87. mean≤á tha⌠ yo⌡ coulΣ desigε ß Z-8░ circui⌠ tha⌠ coulΣ havσá morσ ì
  88. thaεá 25╢ I/╧ address¼á b∙ usinτ thσ "Bó registe≥ a≤ par⌠ oµá thσ ì
  89. I/╧á address«á Thi≤á coulΣ  als∩ mean≤ tha⌠ iµ you≥á I/╧á addres≤ ì
  90. decode≥ doe≤ no⌠ properl∙ accoun⌠ fo≥ thσ A╕ - A1╡ addres≤á line≤ ì
  91. yo⌡ ma∙ no⌠ ge⌠ thσ I/╧ addres≤ yo⌡ want.]
  92.  
  93. "oεá thσá high-orde≥ ╕ bit≤ oµ thσ addres≤ bus¼á anΣ thu≤ ma∙á bσ ì
  94. difficul⌠ t∩ usσ fo≥ accessinτ oε chi≡ I/╧ registers."
  95.  
  96.      "Fo≥ efficien⌠ on-chi≡ I/╧ register≤ access¼ ß numbe≥ oµ ne≈ ì
  97. instruction≤ havσ beeε addeΣ whicΦ forcσ thσ high-orde≥ ╕ bit≤ oµ ì
  98. thσ 16-bi⌠ I/╧ addres≤ t∩ 0«á  Thesσ instruction≤ arσ IN0¼á OUT0¼ ì
  99. OTIM¼á OTIMR¼ OTDM¼ OTDM╥ anΣ TSTI╧ (Seσ sectioε 3.▒ Instruction≤ ì
  100. set)."
  101.  
  102.      [Unfortunitl∙áá thσá instruction≤á describeΣá iεá thσáá las⌠ ì
  103. paragrapΦá woulΣá no⌠á bσ Z-8░ compatible¼á iµá tha⌠á i≤á oµá an∙ ì
  104. consideration«á  ┴á possiblσá solutioε woulΣ bσ t∩ zer∩á thσá "Bó ì
  105. registe≥áá oµá thσá 6418░á o≥á thσá Z-8░á beforσá doinτá an∙á I/╧ ì
  106. instructions¼á howeve≥á thi≤á ma∙á no⌠ bσ possiblσá {iµá thσá "Bó ì
  107. registe≥ i≤ beinτ used² o≥ practica∞ iε al∞ cases.]
  108.   
  109. è
  110.      "Notσá tha⌠ wheε writinτ t∩ aε interna∞á I/╧á register¼á thσ ì
  111. samσá I/╧á writσá occur≤á oεá thσá externa∞á bus«á  However¼á thσ ì
  112. duplicatσá externa∞á I/╧á writσ cyclσ wil∞ exhibi⌠á interna∞á I/╧ ì
  113. writσá cyclσá timing«á  Fo≥á example¼á thσ WAIT¬á inpu⌠á anΣá thσ ì
  114. programmablσá wai⌠á statσ generato≥ arσá ignored.óá  [Thi≤á coulΣ ì
  115. conceivabl∙á causσá somσ slo≈ peripheral≤ t∩ 'g∩ ou⌠ t∩á lunch'.▌ ì
  116. "Similarly¼á interna∞á I/╧á reaΣ cycle≤ als∩á causσá ßá duplicatσ ì
  117. externa∞á I/╧á reaΣ cyclσ - however¼á thσ externa∞ reaΣá datßá i≤ ì
  118. ignoreΣ b∙ thσ HD64180."
  119.  
  120.      "Normally¼á externa∞ I/╧ addresse≤ shoulΣ bσ choseε t∩ avoiΣ ì
  121. overla≡á witΦá interna∞á I/╧á addresse≤ t∩á avoiΣá duplicatσá I/╧ ì
  122. accesses."
  123.  
  124.      Severa∞ place≤ HitachΘ state≤ tha⌠ thσ HD6418░ caεá directl∙ ì
  125. addres≤á 64╦ oµ I/╧ addres≤ [whicΦ i⌠ caε iε hardward▌ (page≤á 2¼ ì
  126. 5¼á 15¼á 5▒ anΣ others)¼ howeve≥ i⌠ doe≤ no⌠ tel∞ ho≈ t∩ d∩ i⌠ iε ì
  127. software«á  I≤ therσ somσ wa∙ beside≤ doinτ trick≤ witΦ "B"¼á DM┴ ì
  128. o≥á I/╧ blocδ instructions¼á tha⌠ ╔ missed¼á t∩ addres≤ morσ thaε ì
  129. 25╢áá I/╧á locations┐áá   (SucΦá a≤á "OU╘á (1234H),regóá o≥áá "I╬ ì
  130. reg,(1234H)".)
  131.  
  132.  
  133.