Changing 42cc and 42ed to 03 causes dBase to look for the files on
drive C. I have looked at later versions of dBase,
and while the actual locations have been changed,
all versions seem to have two of them, between 4200
and 4300, and the ASCII file names make them jump out on a DDT display.
------
^_
Another solution:
Date: Sat, 7 Jan 84 8:27:43 EST
From: Rick Conn <rconn%brl>
I got around it under ZCPR2 by creating a script command like the
following: A:;dbase setup;B:
In this way, I have all my work on B: and dbase.com and its
overlays on A:. The command processor goes to A:, runs dbase, and the
setup.prg file sets default to B:, so any files I reference come from B:.
When done, the trailing B: puts me back into B:.
Rick
11-Jan-84 18:52:36-MST,762;000000000000
Return-Path: <info-cpm-request@BRL-VGR.ARPA>
Received: from BRL-VGR by SIMTEL20.ARPA with TCP; Wed 11 Jan 84 18:52:31-MST
Received: From brl-gateway2.ARPA by BRL-VGR via smtp; 8 Jan 84 17:35 EST
Received: From Sumex-Aim.ARPA by BRL via smtp; 8 Jan 84 17:24 EST
Date: Sun 8 Jan 84 14:28:22-PST
From: Leslie Zatz <ZATZ@SUMEX-AIM.ARPA>
Subject: UTILITIES WITH CPM1.4
To: INFO-CPM@BRL.ARPA
Users of CPM 1.4 should be aware that while the MODEM7xx
series supported 1.4, the MDM7xx series doess not, unffortunately. The NCATxx series indicates that ALLSR must be set false for CPM 1.4, but does not indicate that
DSKFRE must also be set false. Unfortunately, this valuable program can not provide the
free space left on disks in this mode.
-------
12-Jan-84 20:33:59-MST,1397;000000000000
Return-Path: <info-cpm-request@BRL-VGR.ARPA>
Received: from BRL-VGR by SIMTEL20.ARPA with TCP; Thu 12 Jan 84 20:33:54-MST
Received: From uw-vlsi-gw.ARPA by BRL-VGR via smtp; 8 Jan 84 15:27 EST
Date: 8 Jan 1984 11:53:31-PST
From: Ed Mills <capn@uw-vlsi>
To: pur-ee!uiucdcs!parsec!ctvax!uokvax!andree@ucb-vax
Subject: My BIOS for the Ithaca Intersystems 2A.
Cc: info-cpm@brl-vgr
Mike,
My BIOS is based on a copyrighted version distributed by Ithaca
for their system 2A with floppy drives. I can't leagally send that to anyone
who doesn't already have Ithaca's version. The version I started with is
however 2 years out of date from their current version, so if you called
them they might not object to my sending you a copy. You might also try
offering them $10 - $20, they usually just bundle it in with their CP/M.
I can send you more details before you write them a check. I have Cache
BIOS version 4h. My current version is about 50-50 theirs and mine. Their
number is 1-800-847-2088. The person to talk to is Tim Bond.
If you just want to exchange ideas about what might belong in a BIOS,
I would love to talk to people about that. Perhaps a new list is in order?
I neglected to keep a listing of the description I sent to the net,
so if you could send me a copy, I will fill in more details where that one
left off.
Ed Mills
capn@uw-vlsi
12-Jan-84 20:51:20-MST,701;000000000000
Return-Path: <info-cpm-request@BRL-VGR.ARPA>
Received: from BRL-VGR by SIMTEL20.ARPA with TCP; Thu 12 Jan 84 20:51:14-MST
Received: From brl-gateway2.ARPA by BRL-VGR via smtp; 9 Jan 84 5:09 EST
Received: From Sri-Unix.ARPA by BRL via smtp; 9 Jan 84 5:04 EST
Received: from Usenet.uucp by sri-unix.uucp with rs232; 9 Jan 84 1:54-PST
Date: 6 Jan 84 20:17:38-PST (Fri)
To: info-cpm@brl
From: decvax!duke!mcnc!ncsu!ncrcae!jdg@ucb-vax
Subject: 8748 Assembler wanted
Article-I.D.: ncrcae.1046
I am looking for an 8748 assembler that will run under CP/M. Anyone knowing
of such an assembler please let me know. Thanks.
-----Jim Griggers
duke!mcnc!ncsu!ncrcae!jdg
12-Jan-84 20:52:03-MST,497;000000000000
Return-Path: <info-cpm-request@BRL-VGR.ARPA>
Received: from BRL-VGR by SIMTEL20.ARPA with TCP; Thu 12 Jan 84 20:51:59-MST
Received: From brl-gateway2.ARPA by BRL-VGR via smtp; 9 Jan 84 5:19 EST
Received: From Sri-Unix.ARPA by BRL via smtp; 9 Jan 84 5:17 EST
Received: from Usenet.uucp by sri-unix.uucp with rs232; 9 Jan 84 2:08-PST
Date: 8 Jan 84 0:30:36-PST (Sun)
To: info-cpm@brl
From: decvax!duke!mcnc!ecsvax!hsplab@ucb-vax
Subject: cancel ecsvax.1806
Article-I.D.: ecsvax.1807
12-Jan-84 21:33:03-MST,565;000000000000
Return-Path: <info-cpm-request@BRL-VGR.ARPA>
Received: from BRL-VGR by SIMTEL20.ARPA with TCP; Thu 12 Jan 84 21:32:59-MST
Received: From brl-gateway2.ARPA by BRL-VGR via smtp; 9 Jan 84 11:52 EST
Received: From Parc-Maxc.ARPA by BRL via smtp; 9 Jan 84 11:47 EST
Date: Mon, 9 Jan 84 07:22 PST
From: TAFEL.pasa@PARC-MAXC.ARPA
Subject: Re: stork
In-reply-to: "STORK@mit-mc.ARPA's message of 5 Jan 84 20:21 EST"
To: Eric Stork <STORK@mit-mc.ARPA>
cc: info-cpm@brl.ARPA
If you set up ZCPR on your system you will be able to do this very easyly.
Hugo.
13-Jan-84 18:55:51-MST,2465;000000000000
Return-Path: <info-cpm-request@BRL-VGR.ARPA>
Received: from BRL-VGR by SIMTEL20.ARPA with TCP; Fri 13 Jan 84 18:55:44-MST
Received: From brl-gateway2.ARPA by BRL-VGR via smtp; 9 Jan 84 5:19 EST
Received: From Sri-Unix.ARPA by BRL via smtp; 9 Jan 84 5:17 EST
Received: from Usenet.uucp by sri-unix.uucp with rs232; 9 Jan 84 2:08-PST
Date: 8 Jan 84 0:50:58-PST (Sun)
To: info-cpm@brl
From: decvax!duke!mcnc!ecsvax!hsplab@ucb-vax
Subject: MITS 2SIO S-100 Board Information
Article-I.D.: ecsvax.1808
Information about the MITS SIO board is available in the
S-100 Bus Handbook by Dave Bursky. Unfortunately, I do not
have information about the jumpers. Basically the board must
be set up to occupy 4 ports in the IO space of the 8080. The
even ports are for control and the odd ports are for data.
There are two ports on the board. The board uses the Motorola
6850 UARTS and data can be obtained from those data sheets.
Pins 3 and 4 on the 6850 are the receive and transmit clocks
going into the chips. The initial setup must be done with
jumpers and a counter on those pins will tell you the initial
baud rate, the measured rate divided by 16. The following is
an outline of the information accepted by the control port for
the purposes of initializing the 6850:
Bits 5,6,7 control the interrupt circuits. Since most
CPM software handle this poorly, especially for
Mits circuits, they should be set to all zeros
to disable them.
Bits 2,3,4 control the parity/frame size/stop bits