Labels:text | colorfulness | screenshot | purple OCR: The Microprocessor Complex Instruction Support The microprocessor is an integrated chip that controls personal computers The Complex Instruction Support area and other devices. Almost every bit of enables the chip to support program data that enters or leaves the computer code that uses complex instructions as passes through the microprocessor. Its found on CISC chips. Typically, CISC function is to control the flow of instructions take more than one clock information to and from external ports and route information to the appropriate hardware on the motherboard such as video and memory. Advanced Pipelined Floating Point Unit microprocessors such as the one shown have many sections dedicated to a The Floating Point Unit handles specific task. Some of these sections arithmetic instructions requiring higher are explained here. precision and trigonometric functions. The piplined design allows for multiple calculations to be performed Branch Prediction simultaneously. These calculations are also performed while the CPU is doing The Branch Prediction area anticipates other work. where the execution of instructions are headed. By predicting ahead of time what code will be executed next, the Superscalar Integer instruction prefetch unit can load the Execution Unit code into the cache buffers before it is needed. This enables the CPU to The Superscalar Integer Execution Unit perform at top speed. handles arithmetic instructions which do not require floating point functions. The superscalar design allows for multiple Instruction Fetch integer calculations to be performed simultaneously. The Instruction Fetch area obtains the instructions of the executing program as they are needed. Bus Interface Logic The Bus Interface area manages the Instruction Decode chip's external interface. It is connected to the code and data caches and paging The Instruction Decode area receives unit. It controls data and address parity instructions from the prefetch queue and checking and burst memory transfers. converts them to the internal format Some chips incorporate a feature called needed by the execution unit. The address pipelining. This allows two bus internal format includes things such as cycles to progress simultaneously, and microcode start addresses, arithmetic is useful with slower memory systems logic unit (ALU) operators and data because it provides a head start on decoding the next bus cycle's address while the current cycle is still in progress. Code Cache The Code Cache area maintains a buffer of execution code. Using special Data Cache cache algorithms, this buffer enables the The Data Cache area performs similarly processor to obtain instructions without to the Code cache area except that it having to go to slower ram located handles program data instead of external to the CPU. program code. Illustrated by Tim Harrington 1994
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