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GNU Info File
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1994-02-06
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This is Info file gcc.info, produced by Makeinfo-1.49 from the input
file gcc.texi.
This file documents the use and the internals of the GNU compiler.
Copyright (C) 1988, 1989, 1992 Free Software Foundation, Inc.
Permission is granted to make and distribute verbatim copies of this
manual provided the copyright notice and this permission notice are
preserved on all copies.
Permission is granted to copy and distribute modified versions of
this manual under the conditions for verbatim copying, provided also
that the sections entitled "GNU General Public License" and "Protect
Your Freedom--Fight `Look And Feel'" are included exactly as in the
original, and provided that the entire resulting derived work is
distributed under the terms of a permission notice identical to this
Permission is granted to copy and distribute translations of this
manual into another language, under the above conditions for modified
versions, except that the sections entitled "GNU General Public
License" and "Protect Your Freedom--Fight `Look And Feel'", and this
permission notice, may be included in translations approved by the Free
Software Foundation instead of in the original English.
File: gcc.info, Node: Register Classes, Next: Stack and Calling, Prev: Registers, Up: Target Macros
Register Classes
================
On many machines, the numbered registers are not all equivalent. For
example, certain registers may not be allowed for indexed addressing;
certain registers may not be allowed in some instructions. These
machine restrictions are described to the compiler using "register
classes".
You define a number of register classes, giving each one a name and
saying which of the registers belong to it. Then you can specify
register classes that are allowed as operands to particular instruction
patterns.
In general, each register will belong to several classes. In fact,
one class must be named `ALL_REGS' and contain all the registers.
Another class must be named `NO_REGS' and contain no registers. Often
the union of two classes will be another class; however, this is not
required.
One of the classes must be named `GENERAL_REGS'. There is nothing
terribly special about the name, but the operand constraint letters `r'
and `g' specify this class. If `GENERAL_REGS' is the same as
`ALL_REGS', just define it as a macro which expands to `ALL_REGS'.
Order the classes so that if class X is contained in class Y then X
has a lower class number than Y.
The way classes other than `GENERAL_REGS' are specified in operand
constraints is through machine-dependent operand constraint letters.
You can define such letters to correspond to various classes, then use
them in operand constraints.
You should define a class for the union of two classes whenever some
instruction allows both classes. For example, if an instruction allows
either a floating point (coprocessor) register or a general register
for a certain operand, you should define a class `FLOAT_OR_GENERAL_REGS'
which includes both of them. Otherwise you will get suboptimal code.
You must also specify certain redundant information about the
register classes: for each class, which classes contain it and which
ones are contained in it; for each pair of classes, the largest class
contained in their union.
When a value occupying several consecutive registers is expected in a
certain class, all the registers used must belong to that class.
Therefore, register classes cannot be used to enforce a requirement for
a register pair to start with an even-numbered register. The way to
specify this requirement is with `HARD_REGNO_MODE_OK'.
Register classes used for input-operands of bitwise-and or shift
instructions have a special requirement: each such class must have, for
each fixed-point machine mode, a subclass whose registers can transfer
that mode to or from memory. For example, on some machines, the
operations for single-byte values (`QImode') are limited to certain
registers. When this is so, each register class that is used in a
bitwise-and or shift instruction must have a subclass consisting of
registers from which single-byte values can be loaded or stored. This
is so that `PREFERRED_RELOAD_CLASS' can always have a possible value to
return.
`enum reg_class'
An enumeral type that must be defined with all the register class
names as enumeral values. `NO_REGS' must be first. `ALL_REGS'
must be the last register class, followed by one more enumeral
value, `LIM_REG_CLASSES', which is not a register class but rather
tells how many classes there are.
Each register class has a number, which is the value of casting
the class name to type `int'. The number serves as an index in
many of the tables described below.
`N_REG_CLASSES'
The number of distinct register classes, defined as follows:
#define N_REG_CLASSES (int) LIM_REG_CLASSES
`REG_CLASS_NAMES'
An initializer containing the names of the register classes as C
string constants. These names are used in writing some of the
debugging dumps.
`REG_CLASS_CONTENTS'
An initializer containing the contents of the register classes, as
integers which are bit masks. The Nth integer specifies the
contents of class N. The way the integer MASK is interpreted is
that register R is in the class if `MASK & (1 << R)' is 1.
When the machine has more than 32 registers, an integer does not
suffice. Then the integers are replaced by sub-initializers,
braced groupings containing several integers. Each
sub-initializer must be suitable as an initializer for the type
`HARD_REG_SET' which is defined in `hard-reg-set.h'.
`REGNO_REG_CLASS (REGNO)'
A C expression whose value is a register class containing hard
register REGNO. In general there is more than one such class;
choose a class which is "minimal", meaning that no smaller class
also contains the register.
`BASE_REG_CLASS'
A macro whose definition is the name of the class to which a valid
base register must belong. A base register is one used in an
address which is the register value plus a displacement.
`INDEX_REG_CLASS'
A macro whose definition is the name of the class to which a valid
index register must belong. An index register is one used in an
address where its value is either multiplied by a scale factor or
added to another register (as well as added to a displacement).
`REG_CLASS_FROM_LETTER (CHAR)'
A C expression which defines the machine-dependent operand
constraint letters for register classes. If CHAR is such a
letter, the value should be the register class corresponding to
it. Otherwise, the value should be `NO_REGS'. The register
letter `r', corresponding to class `GENERAL_REGS', will not be
passed to this macro; you do not need to handle it.
`REGNO_OK_FOR_BASE_P (NUM)'
A C expression which is nonzero if register number NUM is suitable
for use as a base register in operand addresses. It may be either
a suitable hard register or a pseudo register that has been
allocated such a hard register.
`REGNO_OK_FOR_INDEX_P (NUM)'
A C expression which is nonzero if register number NUM is suitable
for use as an index register in operand addresses. It may be
either a suitable hard register or a pseudo register that has been
allocated such a hard register.
The difference between an index register and a base register is
that the index register may be scaled. If an address involves the
sum of two registers, neither one of them scaled, then either one
may be labeled the "base" and the other the "index"; but whichever
labeling is used must fit the machine's constraints of which
registers may serve in each capacity. The compiler will try both
labelings, looking for one that is valid, and will reload one or
both registers only if neither labeling works.
`PREFERRED_RELOAD_CLASS (X, CLASS)'
A C expression that places additional restrictions on the register
class to use when it is necessary to copy value X int