home
***
CD-ROM
|
disk
|
FTP
|
other
***
search
/
Fresh Fish 7
/
FreshFishVol7.bin
/
bbs
/
gnu
/
gcc-2.3.3-src.lha
/
GNU
/
src
/
amiga
/
gcc-2.3.3
/
config
/
pyr.md
< prev
next >
Wrap
Text File
|
1994-02-06
|
39KB
|
1,415 lines
;; GNU C machine description for Pyramid 90x, 9000, MIServer Series
;; Copyright (C) 1989, 1990 Free Software Foundation, Inc.
;; This file is part of GNU CC.
;; GNU CC is free software; you can redistribute it and/or modify
;; it under the terms of the GNU General Public License as published by
;; the Free Software Foundation; either version 2, or (at your option)
;; any later version.
;; GNU CC is distributed in the hope that it will be useful,
;; but WITHOUT ANY WARRANTY; without even the implied warranty of
;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
;; GNU General Public License for more details.
;; You should have received a copy of the GNU General Public License
;; along with GNU CC; see the file COPYING. If not, write to
;; the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
;; Instruction patterns. When multiple patterns apply,
;; the first one in the file is chosen.
;;
;; See file "rtl.def" for documentation on define_insn, match_*, et. al.
;;
;; cpp macro #define NOTICE_UPDATE_CC in file tm.h handles condition code
;; updates for most instructions.
;; These comments are mostly obsolete. Written for gcc version 1.XX.
;; * Try using define_insn instead of some peepholes in more places.
;; * Set REG_NOTES:REG_EQUIV for cvt[bh]w loads. This would make the
;; backward scan in sign_extend needless.
;; * Match (pc) (label_ref) case in peephole patterns.
;; * Should optimize
;; "cmpX op1,op2; b{eq,ne} LY; ucmpX op1.op2; b{lt,le,gt,ge} LZ"
;; to
;; "ucmpX op1,op2; b{eq,ne} LY; b{lt,le,gt,ge} LZ"
;; by pre-scanning insn and running notice_update_cc for them.
;; * Is it necessary to do copy_rtx in the test and compare patterns?
;; * Fix true frame pointer omission.
;; * Make the jump tables contain branches, not addresses! This would
;; save us one instruction.
;; * Could the complicated scheme for compares be simplified, if we had
;; no named cmpqi or cmphi patterns, and instead anonymous patterns for
;; the less-than-word compare cases pyr can handle???
;; * The jump insn seems to accept more than just IR addressing. Would
;; we win by telling GCC? Or can we use movw into the global reg which
;; is a synonym for pc?
;; * More DImode patterns.
;; * Scan backwards in "zero_extendhisi2", "zero_extendqisi2" to find out
;; if the extension can be omitted.
;; * "divmodsi" with Pyramid "ediv" insn. Is it possible in rtl??
;; * Would "rcsp tmpreg; u?cmp[bh] op1_regdispl(tmpreg),op2" win in
;; comparison with the two extensions and single test generated now?
;; The rcsp insn could be expanded, and moved out of loops by the
;; optimizer, making 1 (64 bit) insn of 3 (32 bit) insns in loops.
;; The rcsp insn could be followed by an add insn, making non-displacement
;; IR addressing sufficient.
;______________________________________________________________________
;
; Test and Compare Patterns.
;______________________________________________________________________
; The argument for the rather complicated test and compare expansion
; scheme, is the irregular pyramid instructions for these operations.
; 1) Pyramid has different signed and unsigned compares. 2) HImode
; and QImode integers are memory-memory and immediate-memory only. 3)
; Unsigned HImode compares doesn't exist. 4) Only certain
; combinations of addresses are allowed for memory-memory compares.
; Whenever necessary, in order to fulfill these addressing
; constraints, the compare operands are swapped.
(define_expand "tstsi"
[(set (cc0)
(match_operand:SI 0 "general_operand" ""))]
"" "operands[0] = force_reg (SImode, operands[0]);")
(define_insn ""
[(set (cc0)
(compare (match_operand:SI 0 "memory_operand" "m")
(match_operand:SI 1 "memory_operand" "m")))]
"weird_memory_memory (operands[0], operands[1])"
"*
{
rtx br_insn = NEXT_INSN (insn);
RTX_CODE br_code;
if (GET_CODE (br_insn) != JUMP_INSN)
abort();
br_code = GET_CODE (XEXP (XEXP (PATTERN (br_insn), 1), 0));
weird_memory_memory (operands[0], operands[1]);
if (swap_operands)
{
cc_status.flags = CC_REVERSED;
if (TRULY_UNSIGNED_COMPARE_P (br_code))
{
cc_status.mdep = CC_VALID_FOR_UNSIGNED;
return \"ucmpw %0,%1\";
}
return \"cmpw %0,%1\";
}
if (TRULY_UNSIGNED_COMPARE_P (br_code))
{
cc_status.mdep = CC_VALID_FOR_UNSIGNED;
return \"ucmpw %1,%0\";
}
return \"cmpw %1,%0\";
}")
(define_insn "cmpsi"
[(set (cc0)
(compare (match_operand:SI 0 "nonimmediate_operand" "r,g")
(match_operand:SI 1 "general_operand" "g,r")))]
""
"*
{
rtx br_insn = NEXT_INSN (insn);
RTX_CODE br_code;
if (GET_CODE (br_insn) != JUMP_INSN)
abort();
br_code = GET_CODE (XEXP (XEXP (PATTERN (br_insn), 1), 0));
if (which_alternative != 0)
{
cc_status.flags = CC_REVERSED;
if (TRULY_UNSIGNED_COMPARE_P (br_code))
{
cc_status.mdep = CC_VALID_FOR_UNSIGNED;
return \"ucmpw %0,%1\";
}
return \"cmpw %0,%1\";
}
if (TRULY_UNSIGNED_COMPARE_P (br_code))
{
cc_status.mdep = CC_VALID_FOR_UNSIGNED;
return \"ucmpw %1,%0\";
}
return \"cmpw %1,%0\";
}")
(define_insn ""
[(set (cc0)
(match_operand:SI 0 "nonimmediate_operand" "r"))]
""
"*
{
#if 0
cc_status.flags |= CC_NO_OVERFLOW;
return \"cmpw $0,%0\";
#endif
rtx br_insn = NEXT_INSN (insn);
RTX_CODE br_code;
if (GET_CODE (br_insn) != JUMP_INSN)
abort();
br_code = GET_CODE (XEXP (XEXP (PATTERN (br_insn), 1), 0));
if (TRULY_UNSIGNED_COMPARE_P (br_code))
{
cc_status.mdep = CC_VALID_FOR_UNSIGNED;
return \"ucmpw $0,%0\";
}
return \"mtstw %0,%0\";
}")
(define_expand "cmphi"
[(set (cc0)
(compare (match_operand:HI 0 "nonimmediate_operand" "")
(match_operand:HI 1 "general_operand" "")))]
""
"
{
extern rtx test_op0, test_op1; extern enum machine_mode test_mode;
test_op0 = copy_rtx (operands[0]);
test_op1 = copy_rtx (operands[1]);
test_mode = HImode;
DONE;
}")
(define_expand "tsthi"
[(set (cc0)
(match_operand:HI 0 "nonimmediate_operand" ""))]
""
"
{
extern rtx test_op0; extern enum machine_mode test_mode;
test_op0 = copy_rtx (operands[0]);
test_mode = HImode;
DONE;
}")
(define_insn ""
[(set (cc0)
(compare (match_operand:HI 0 "memory_operand" "m")
(match_operand:HI 1 "memory_operand" "m")))]
"(!TRULY_UNSIGNED_COMPARE_P (GET_CODE (XEXP (SET_SRC (PATTERN (NEXT_INSN (insn))), 0))))
&& weird_memory_memory (operands[0], operands[1])"
"*
{
rtx br_insn = NEXT_INSN (insn);
if (GET_CODE (br_insn) != JUMP_INSN)
abort();
weird_memory_memory (operands[0], operands[1]);
if (swap_operands)
{
cc_status.flags = CC_REVERSED;
return \"cmph %0,%1\";
}
return \"cmph %1,%0\";
}")
(define_insn ""
[(set (cc0)
(compare (match_operand:HI 0 "nonimmediate_operand" "r,m")
(match_operand:HI 1 "nonimmediate_operand" "m,r")))]
"(!TRULY_UNSIGNED_COMPARE_P (GET_CODE (XEXP (SET_SRC (PATTERN (NEXT_INSN (insn))), 0))))
&& (GET_CODE (operands[0]) != GET_CODE (operands[1]))"
"*
{
rtx br_insn = NEXT_INSN (insn);
if (GET_CODE (br_insn) != JUMP_INSN)
abort();
if (which_alternative != 0)
{
cc_status.flags = CC_REVERSED;
return \"cmph %0,%1\";
}
return \"cmph %1,%0\";
}")
(define_expand "cmpqi"
[(set (cc0)
(compare (match_operand:QI 0 "nonimmediate_operand" "")
(match_operand:QI 1 "general_operand" "")))]
""
"
{
extern rtx test_op0, test_op1; extern enum machine_mode test_mode;
test_op0 = copy_rtx (operands[0]);
test_op1 = copy_rtx (operands[1]);
test_mode = QImode;
DONE;
}")
(define_expand "tstqi"
[(set (cc0)
(match_operand:QI 0 "nonimmediate_operand" ""))]
""
"
{
extern rtx test_op0; extern enum machine_mode test_mode;
test_op0 = copy_rtx (operands[0]);
test_mode = QImode;
DONE;
}")
(define_insn ""
[(set (cc0)
(compare (match_operand:QI 0 "memory_operand" "m")
(match_operand:QI 1 "memory_operand" "m")))]
"weird_memory_memory (operands[0], operands[1])"
"*
{
rtx br_insn = NEXT_INSN (insn);
RTX_CODE br_code;
if (GET_CODE (br_insn) != JUMP_INSN)
abort();
br_code = GET_CODE (XEXP