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1994-02-21
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This is Info file make.info, produced by Makeinfo-1.54 from the input
file ./make.texinfo.
This file documents the GNU Make utility, which determines
automatically which pieces of a large program need to be recompiled,
and issues the commands to recompile them.
This is Edition 0.45, last updated 14 December 1993, of `The GNU
Make Manual', for `make', Version 3.70 Beta.
Copyright (C) 1988, '89, '90, '91, '92, '93 Free Software
Foundation, Inc.
Permission is granted to make and distribute verbatim copies of this
manual provided the copyright notice and this permission notice are
preserved on all copies.
Permission is granted to copy and distribute modified versions of
this manual under the conditions for verbatim copying, provided that
the entire resulting derived work is distributed under the terms of a
permission notice identical to this one.
Permission is granted to copy and distribute translations of this
manual into another language, under the above conditions for modified
versions, except that this permission notice may be stated in a
translation approved by the Free Software Foundation.
File: make.info, Node: Environment, Prev: Defining, Up: Using Variables
Variables from the Environment
==============================
Variables in `make' can come from the environment in which `make' is
run. Every environment variable that `make' sees when it starts up is
transformed into a `make' variable with the same name and value. But
an explicit assignment in the makefile, or with a command argument,
overrides the environment. (If the `-e' flag is specified, then values
from the environment override assignments in the makefile. *Note
Summary of Options: Options Summary. But this is not recommended
practice.)
Thus, by setting the variable `CFLAGS' in your environment, you can
cause all C compilations in most makefiles to use the compiler switches
you prefer. This is safe for variables with standard or conventional
meanings because you know that no makefile will use them for other
things. (But this is not totally reliable; some makefiles set `CFLAGS'
explicitly and therefore are not affected by the value in the
environment.)
When `make' is invoked recursively, variables defined in the outer
invocation can be passed to inner invocations through the environment
(*note Recursive Use of `make': Recursion.). By default, only
variables that came from the environment or the command line are passed
to recursive invocations. You can use the `export' directive to pass
other variables. *Note Communicating Variables to a Sub-`make':
Variables/Recursion, for full details.
Other use of variables from the environment is not recommended. It
is not wise for makefiles to depend for their functioning on
environment variables set up outside their control, since this would
cause different users to get different results from the same makefile.
This is against the whole purpose of most makefiles.
Such problems would be especially likely with the variable `SHELL',
which is normally present in the environment to specify the user's
choice of interactive shell. It would be very undesirable for this
choice to affect `make'. So `make' ignores the environment value of
`SHELL'.
File: make.info, Node: Conditionals, Next: Functions, Prev: Using Variables, Up: Top
Conditional Parts of Makefiles
******************************
A "conditional" causes part of a makefile to be obeyed or ignored
depending on the values of variables. Conditionals can compare the
value of one variable to another, or the value of a variable to a
constant string. Conditionals control what `make' actually "sees" in
the makefile, so they *cannot* be used to control shell commands at the
time of execution.
* Menu:
* Conditional Example:: Example of a conditional
* Conditional Syntax:: The syntax of conditionals.
* Testing Flags:: Conditionals that test flags.
File: make.info, Node: Conditional Example, Next: Conditional Syntax, Up: Conditionals
Example of a Conditional
========================
The following example of a conditional tells `make' to use one set
of libraries if the `CC' variable is `gcc', and a different set of
libraries otherwise. It works by controlling which of two command
lines will be used as the command for a rule. The result is that
`CC=gcc' as an argument to `make' changes not only which compiler is
used but also which libraries are linked.
libs_for_gcc = -lgnu
normal_libs =
foo: $(objects)
ifeq ($(CC),gcc)
$(CC) -o foo $(objects) $(libs_for_gcc)
else
$(CC) -o foo $(objects) $(normal_libs)
endif
This conditional uses three directives: one `ifeq', one `else' and
one `endif'.
The `ifeq' directive begins the conditional, and specifies the
condition. It contains two arguments, separated by a comma and
surrounded by parentheses. Variable substitution is performed on both
arguments and then they are compared. The lines of the makefile
following the `ifeq' are obeyed if the two arguments match; otherwise
they are ignored.
The `else' directive causes the following lines to be obeyed if the
previous conditional failed. In the example above, this means that the
second alternative linking command is used whenever the first
alternative is not used. It is optional to have an `else' in a
conditional.
The `endif' directive ends the conditional. Every conditional must
end with an `endif'. Unconditional makefile text follows.
As this example illustrates, conditionals work at the textual level:
the lines of the conditional are treated as part of the makefile, or
ignored, according to the condition. This is why the larger syntactic
units of the makefile, such as rules, may cross the beginning or the
end of the conditional.
When the variable `CC' has the value `gcc', the above example has
this effect:
foo: $(objects)
$(CC) -o foo $(objects) $(libs_for_gcc)
When the variable `CC' has any other value, the effect is this:
foo: $(objects)
$(CC) -o foo $(objects) $(normal_libs)
Equivalent results can be obtained in another way by
conditionalizing a variable assignment and then using the variable
unconditionally:
libs_for_gcc = -lgnu
normal_libs =
ifeq ($(CC),gcc)
libs=$(libs_for_gcc)
else
libs=$(normal_libs)
endif
foo: $(objects)
$(CC) -o foo $(objects) $(libs)
File: make.info, Node: Conditional Syntax, Next: Testing Flags, Prev: Conditional Example, Up: Conditionals
Syntax of Conditionals
======================
The syntax of a simple conditional with no `else' is as follows:
CONDITIONAL-DIRECTIVE
TEXT-IF-TRUE
endif
The TEXT-IF-TRUE may be any lines of text, to be considered as part of
the makefile if the condition is true. If the condition is false, no
text is used instead.
The syntax of a complex conditional is as follows:
CONDITIONAL-DIRECTIVE
TEXT-IF-TRUE
else
TEXT-IF-FALSE
endif
If the condition is true, TEXT-IF-TRUE is used; otherwise,
TEXT-IF-FALSE is used instead. The TEXT-IF-FALSE can be any number of
lines of text.
The syntax of the CONDITIONAL-DIRECTIVE is the same whether the
conditional is simple or complex. There are four different directives
that test different conditions. Here is a table of them:
`ifeq (ARG1, ARG2)'
`ifeq 'ARG1' 'ARG2''
`ifeq "ARG1" "ARG2"'
`ifeq "ARG1" 'ARG2''
`ifeq 'ARG1' "ARG2"'
Expand all variable references in ARG1 and ARG2 and compare them.
If they are identical, the TEXT-IF-TRUE is effective; otherwise,
the TEXT-IF-FALSE, if any, is effective.
Often you want to test if a variable has a non-empty value. When
the value results from complex expansions of variables and
functions, expansions you would consider empty may actually
contain whitespace characters and thus are not seen as empty.
However, you can use the `strip' function (*note Text
Functions::.) to avoid interpreting whitespace as a non-empty
value. For example:
ifeq ($(strip $(foo)),)
TEXT-IF-EMPTY